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Volumn 7, Issue 2, 2008, Pages

Fast exploration of bus-based communication architectures at the CCATB abstraction

Author keywords

Communication architecture; On chip bus; Performance exploration; System on chip; Transaction level modeling

Indexed keywords

BUS SIGNALS; COMMUNICATION ARCHITECTURES; SYSTEM-ON-CHIP (SOC); TRANSACTION-LEVEL MODELING (TLM);

EID: 40549141807     PISSN: 15399087     EISSN: 15583465     Source Type: Journal    
DOI: 10.1145/1331331.1331346     Document Type: Conference Paper
Times cited : (18)

References (30)
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