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Volumn 7, Issue 2, 2008, Pages
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Fast exploration of bus-based communication architectures at the CCATB abstraction
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Author keywords
Communication architecture; On chip bus; Performance exploration; System on chip; Transaction level modeling
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Indexed keywords
BUS SIGNALS;
COMMUNICATION ARCHITECTURES;
SYSTEM-ON-CHIP (SOC);
TRANSACTION-LEVEL MODELING (TLM);
COMPUTER SIMULATION;
HIGH LEVEL LANGUAGES;
NETWORK ARCHITECTURE;
SYSTEMS ANALYSIS;
COMMUNICATION SYSTEMS;
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EID: 40549141807
PISSN: 15399087
EISSN: 15583465
Source Type: Journal
DOI: 10.1145/1331331.1331346 Document Type: Conference Paper |
Times cited : (18)
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References (30)
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