-
1
-
-
84876572683
-
Owner prediction for accelerating cache-to-cache transfer misses in a ccNUMA architecture
-
M. E. Acacio, J. Gonzalez, J. M. Garcia, and J. Duato, "Owner prediction for accelerating cache-to-cache transfer misses in a ccNUMA architecture," in Proc. of conf. on SC, 2002.
-
(2002)
Proc. of conf. on SC
-
-
Acacio, M.E.1
Gonzalez, J.2
Garcia, J.M.3
Duato, J.4
-
2
-
-
27544481926
-
Variability in architectural simulations of multi-threaded workloads
-
A. R. Alameldeen and D. A. Wood, "Variability in architectural simulations of multi-threaded workloads," in HPCA, 2003.
-
(2003)
HPCA
-
-
Alameldeen, A.R.1
Wood, D.A.2
-
3
-
-
44149108290
-
Multicast snooping: A new coherence method using a multicast address network
-
May
-
E. Bilir et al, "Multicast snooping: A new coherence method using a multicast address network," in Proc. of ISGA, May 1999.
-
(1999)
Proc. of ISGA
-
-
Bilir, E.1
-
4
-
-
44149121796
-
Precise and accurate processor simulation
-
H. Cain, K. Lepak, B. Schwarz, and M. H. Lipasti, "Precise and accurate processor simulation," in CAECW, 2002.
-
(2002)
CAECW
-
-
Cain, H.1
Lepak, K.2
Schwarz, B.3
Lipasti, M.H.4
-
5
-
-
27544506862
-
Improving multiprocessor performance with coarse-grain coherence tracking
-
J. F. Cantin et al, "Improving multiprocessor performance with coarse-grain coherence tracking," in Proc. of the 32th ISCA, 2005.
-
(2005)
Proc. of the 32th ISCA
-
-
Cantin, J.F.1
-
7
-
-
33746286148
-
Switch design to enable predictive multiplexed switching in multiprocessor networks
-
Z. Ding et. al, "Switch design to enable predictive multiplexed switching in multiprocessor networks," in IPDPS, 2005.
-
(2005)
IPDPS
-
-
Ding, Z.1
et., al.2
-
8
-
-
30644464162
-
A high-performance router architecture for interconnection networks
-
J. Duato et. al, "A high-performance router architecture for interconnection networks," in ICCP, 1996.
-
(1996)
ICCP
-
-
Duato, J.1
et., al.2
-
9
-
-
47349085587
-
An evaluation of server consolidation workloads for multi-core designs
-
N. Enright Jerger et. al, "An evaluation of server consolidation workloads for multi-core designs," in Proc of IISWC, 2007.
-
(2007)
Proc of IISWC
-
-
Enright Jerger, N.1
et., al.2
-
10
-
-
0029305385
-
A family of fault tolerant routing protocols for direct multiprocessor networks
-
May
-
P. Gaughan and S. Yalamanchili, "A family of fault tolerant routing protocols for direct multiprocessor networks," TPDS, vol. 6, no. 5, May 1995.
-
(1995)
TPDS
, vol.6
, Issue.5
-
-
Gaughan, P.1
Yalamanchili, S.2
-
11
-
-
36348975404
-
Implementation and evaluation of on-chip network architectures
-
P. Gratz et al, "Implementation and evaluation of on-chip network architectures," in ICCD, 2006.
-
(2006)
ICCD
-
-
Gratz, P.1
-
12
-
-
35348826095
-
Physical simulation for animation and visual effects: Parallelization and characterization for chip multiprocessors
-
C. J. Hughes et. al, "Physical simulation for animation and visual effects: Parallelization and characterization for chip multiprocessors," in ISCA, 2007.
-
(2007)
ISCA
-
-
Hughes, C.J.1
et., al.2
-
13
-
-
34547625568
-
Coherence communcation prediction in shared-memory multiprocessors
-
S. Kaxiras and C. Young, "Coherence communcation prediction in shared-memory multiprocessors," in Proc. of HPCA-6, 2000.
-
(2000)
Proc. of HPCA-6
-
-
Kaxiras, S.1
Young, C.2
-
14
-
-
47349129525
-
Flattened butterfly topology for on-chip networks
-
J. Kim, J. Balfour, and W. Dally, "Flattened butterfly topology for on-chip networks," in MICRO-40, 2007.
-
(2007)
MICRO-40
-
-
Kim, J.1
Balfour, J.2
Dally, W.3
-
15
-
-
35348858651
-
-
A. Kumar, L.-S. Peh, P. Kundu, and N. K. Jha, Express virtual channels: Toward the ideal interconnection fabric, in In Proceedings of ISCA-S4, 2007.
-
A. Kumar, L.-S. Peh, P. Kundu, and N. K. Jha, "Express virtual channels: Toward the ideal interconnection fabric," in In Proceedings of ISCA-S4, 2007.
-
-
-
-
16
-
-
52949114554
-
A 4.61'bits/s 3.6GHz single-cycle NoC router with a novel switch allocator in 65nm CMOS
-
A. Kumar et al, "A 4.61'bits/s 3.6GHz single-cycle NoC router with a novel switch allocator in 65nm CMOS," in ICCD, 2007.
-
(2007)
ICCD
-
-
Kumar, A.1
-
19
-
-
4644301652
-
Low-latency virtual-channel routers for on-chip networks
-
R. Mullins, A. West, and S. Moore, "Low-latency virtual-channel routers for on-chip networks," in ISCA, 2004.
-
(2004)
ISCA
-
-
Mullins, R.1
West, A.2
Moore, S.3
-
20
-
-
0034581364
-
-
L.-S. Peh and W. J. Dally, Flit reservation flow control, in In Proceedings of the 6th HPCA, 2000.
-
L.-S. Peh and W. J. Dally, "Flit reservation flow control," in In Proceedings of the 6th HPCA, 2000.
-
-
-
-
21
-
-
33748554106
-
A hybrid SoC interconnect with dynamic TDMA-based transaction-less buses and on-chip networks
-
T. D. Richardson et. al, "A hybrid SoC interconnect with dynamic TDMA-based transaction-less buses and on-chip networks," in Conference on VLSI Design, 2006.
-
(2006)
Conference on VLSI Design
-
-
Richardson, T.D.1
et., al.2
-
22
-
-
24644502365
-
-
SPEC
-
SPEC, "SPEC benchmarks," http://www.spec.org.
-
SPEC benchmarks
-
-
-
23
-
-
84955456130
-
Scalar operand networks: On-chip interconnect for ilp in partitioned architectures
-
Feb
-
M. B. Taylor et al, "Scalar operand networks: On-chip interconnect for ilp in partitioned architectures," in HPCA, Feb 2003.
-
(2003)
HPCA
-
-
Taylor, M.B.1
-
24
-
-
84871283702
-
-
TPC
-
TPC, "TPC benchmarks," http://www.tpc.org.
-
TPC benchmarks
-
-
-
25
-
-
84948976085
-
Orion: A power-performance simulator for interconnection networks
-
H.-S. Wang et al, "Orion: A power-performance simulator for interconnection networks," in Proc. of MICRO-S5, 2002.
-
(2002)
Proc. of MICRO-S5
-
-
Wang, H.-S.1
-
26
-
-
84947211640
-
SoCBus: Switched network on chip for hard real time embedded systems
-
D. Wiklund and D. Liu, "SoCBus: Switched network on chip for hard real time embedded systems," in IPDPS, 2003.
-
(2003)
IPDPS
-
-
Wiklund, D.1
Liu, D.2
-
27
-
-
33746316540
-
An energy efficient reconfigurable circuit-switched network-on-chip
-
P. T. Wolkotte et. al, "An energy efficient reconfigurable circuit-switched network-on-chip," in Proc. of IEEE IPDPS, 2005.
-
(2005)
Proc. of IEEE IPDPS
-
-
Wolkotte, P.T.1
et., al.2
-
28
-
-
0002375353
-
The SPLASH-2 programs: Characterization and methodological considerations
-
S. Woo et. al, "The SPLASH-2 programs: Characterization and methodological considerations," in Proc. of the 22th ISCA, 1995.
-
(1995)
Proc. of the 22th ISCA
-
-
Woo, S.1
et., al.2
|