Implementation of silicon-on-glass MEMS devices with embedded through-wafer silicon vias using the glass reflow process for wafer-level packaging and 3D chip integration

Journal of Micromechanics and Microengineering

Volumn 18, Issue 2, 2008, Pages

  Lin, Chiung Wen ^a   Hsu, Chia Pao ^a   Yang, Hsueh An ^b   Wang, Wei Chung ^a,b   Fang, Weileun ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^b ADVANCED SEMICONDUCTOR ENGINEERING INC   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; GLASS; MICROMACHINING; SILICON WAFERS; THERMAL EXPANSION;

EMBEDDED SILICON; HERMETIC PACKAGING;

MEMS;

EID: 42549147822     PISSN: 09601317     EISSN: 13616439     Source Type: Journal    
DOI: 10.1088/0960-1317/18/2/025018     Document Type: Article

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