High density through wafer via technology

2007 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2007, Technical Proceedings

Volumn 3, Issue , 2007, Pages 116-119

  Bauer, Tomas ^a  

^a Silex Microsystems   (Sweden)

Author keywords

3d interconnect; CMOS integration; Interposer; Through silicon via; Wafer level packaging

Indexed keywords

CARRIER CONCENTRATION; CHIP SCALE PACKAGES; MEMS; MICROFLUIDICS; OPTICAL SYSTEMS; TECHNOLOGY TRANSFER;

3D INTERCONNECTS; CMOS INTEGRATION; THROUGH SILICON VIA; WAFER LEVEL PACKAGING;

SILICON WAFERS;

EID: 34547969120     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (1)

1. Edvard Kälvesten, Thorbjörn Ebefors, Niklas Svedin, Pelle Rangsten, Tommy Schönberg, "Elektriska anslutningar i substrat / Electrical connections in substrates", Swedish Patent No. : 0300784. Several parallel International patent application publications (in English) e.g. WO2004084300 published 30.09.2004, as well as other patent applications within SILEX Via technology patent portfolio are available through different patent databases).