Oxide thickness optimization for digital subthreshold operation

IEEE Transactions on Electron Devices

Volumn 55, Issue 2, 2008, Pages 685-688

  Paul, Bipul C ^a,b   Roy, Kaushik ^c  

^a Toshiba America Research Inc   (United States)

^b STANFORD UNIVERSITY   (United States)

^c PURDUE UNIVERSITY   (United States)

Author keywords

Device design; Oxide thickness optimization; Subthreshold operation

Indexed keywords

MOSFET DEVICES; OPTIMIZATION; THRESHOLD VOLTAGE;

DIGITAL SUBTHRESHOLD LOGIC; DIGITAL SUBTHRESHOLD OPERATION; OXIDE THICKNESS;

TRANSISTORS;

EID: 39749178512     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2007.912383     Document Type: Article

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