General approach to compact threshold voltage formulation based on 2-D numerical simulation and experimental correlation for deep-submicron ULSI technology development

IEEE Transactions on Electron Devices

Volumn 47, Issue 1, 2000, Pages 214-221

  Zhou, Xing ^a   Lim, Khee Yong ^a   Lim, David ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; CORRELATION METHODS; CURVE FITTING; EXTRAPOLATION; INTERPOLATION; ITERATIVE METHODS; MATHEMATICAL MODELS; MOSFET DEVICES; SEMICONDUCTOR DOPING; THRESHOLD VOLTAGE;

COMPACT MODELING; DEEP SUBMICRON TECHNOLOGY DEVELOPMENT; SHORT CHANNEL EFFECT;

VLSI CIRCUITS;

EID: 0033882752     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.817588     Document Type: Article

References (12)