Study of single- and dual-channel designs for high-performance strained-Si-SiGe n-MOSFETs

IEEE Transactions on Electron Devices

Volumn 51, Issue 8, 2004, Pages 1245-1253

  Olsen, Sarah H ^a   O'Neill, Anthony G ^a   Chattopadhyay, Sanatan ^a   Driscoll, Luke S ^a   Kwa, K S K ^a   Norris, D J ^b   Cullis, A G ^b   Paul, Douglas J ^c  

^a NEWCASTLE UNIVERSITY   (United Kingdom)

^b UNIVERSITY OF SHEFFIELD   (United Kingdom)

^c UNIVERSITY OF CAMBRIDGE   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRON MOBILITY; EPITAXIAL GROWTH; SEMICONDUCTING SILICON COMPOUNDS; SURFACE ROUGHNESS; THRESHOLD VOLTAGE; TRANSMISSION ELECTRON MICROSCOPY;

DUAL CHANNEL; GATE OXIDE INTERFACE; MOBILITY ENHANCEMENT; SEMICONDUCTOR DEVICE FABRICATION; SILICON GERMANIUM; SINGLE CHANNEL; STRAINED SILICON; THERMAL BUDGET; VIRTUAL SUBSTRATE;

MOSFET DEVICES;

EID: 3943090526     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.830652     Document Type: Article

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