Fabrication and analysis of deep submicron strained-Si N-MOSFET's

IEEE Transactions on Electron Devices

Volumn 47, Issue 7, 2000, Pages 1406-1415

  Rim, Kern ^a,b,c   Hoyt, Judy L ^a,b,d   Gibbons, James F ^a,b,e  

^a IEEE

^b Stanford University   (United States)

^c IBM T J WATSON RESEARCH CENTER   (United States)

^d USA   (United States)

^e STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRON SCATTERING; HETEROJUNCTIONS; PHONONS; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DOPING; SILICON ON INSULATOR TECHNOLOGY; TRANSCONDUCTANCE;

CARRIER PHONON SCATTERING; DEEP SUBMICRON STRAINED SILICON; HYDRODYNAMIC DEVICE SIMULATIONS; SHORT CHANNEL EFFECTS; SILICON CONTROL DEVICES;

MOSFET DEVICES;

EID: 0034227743     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.848284     Document Type: Article

References (30)

1. S. F. Nelson, K. Ismail, J. O. Chu, and B. S. Meyerson, "Room-temperature electron mobility in strained Si/SiGe heterostructures," Appl. Phys. Lett., vol. 63, pp. 367-369, 1993.
2. K. Ismail, M. Arafa, K. L. Saenger, J. O. Chu, and B. S. Mererson, "Extremely high electron mobility in Si/SiGe modulation-doped heterostructures," Appl. Phys. Lett., vol. 66, pp. 1077-1079, 1995.
3. x. substrates," Appl. Phys. Lett., vol. 63, pp. 186-188, 1993.
4. x substrate by Monte Carlo simulation," Appl. Phys. Lett., vol. 62, pp. 2661-2663, 1993.
5. M. V. Fischetti and S. E. Laux, "Band structure, deformation potentials, and carrier mobility in strained Si, Ge, and SiGe alloys," J. Appl. Phys., vol. 80, pp. 2234-2252, 1996.
6. S. Takagi, J. L. Hoyt, J. J. Welser, and J. F. Gibbons, "Comparative study of phononlimited mobility of two-dimensional electrons in strained and unstrained Si metal-oxide-semiconductor field-effect transistors," J. Appl. Phys., vol. 80, pp. 1567-1577, 1996.
7. J. Welser, J. L. Hoyt, S. Takagi, and J. F. Gibbons, "Strain dependence of the performance enhancement in strained-Si n-MOSFETs," in IEDM Tech. Dig., p. 947.
8. K. Rim, J. Welser, J. L. Hoyt, and J. F. Gibbons, "Enhanced hole mobilities in surface-channel strained-Si p-MOSFETs," in IEDM Tech. Dig., 1995, p. 1026.
9. M. R. Pinto, E. Sangiorgi, and J. Bude, "Silicon MOS transconductance scaling into the overshoot regime," IEEE Electron Device Lett., vol. 14, pp. 375-378, 1993.
10. K. Rim, J. L. Hoyt, and J. F. Gibbons, "Transconductance enhancement in deep submicron strained Si n-MOSFETs," in IEDM Tech. Dig., 1998, p. 707.
11. x/strained-Si structures for metal-oxide semiconductor applications," Jpn. J. Appl. Phys., Part 1, vol. 33, pp. 2419-2422, 1994.
12. J. J. Welser, "The application of strained-silicon/relaxed-silicon germanium heterostructures to metal-oxide-semiconductor field-effect transistors," Ph.D. dissertation, Dept. Elect. Eng., Stanford Univ., Stanford, CA, 1994.
13. x," in ProcSymp. Strained Layer Epitaxy - Materials, Processing, and Device Applications, E. A. Fitzgerald et al. Ed., 1995, pp. 373-378.
14. TSUPREM-IV, Version 1998.4.0, Avant! Corp. and TMA, Inc., 1998.
15. P. D. Agnello, V. P. Kesan, M. Tejwani, and J. A. Ott, "Titanium silicide/germanide formation on submicron features for high mobility SiGe channel field effect transistors," J. Electron. Mater., vol. 23, pp. 413-121, 1994.
16. K. Rim, "Application of silicon-based heterostructures to enhanced mobility metal-oxide-semiconductor field-effect transistors," Ph.D. dissertation, Dept. Elect. Eng., Stanford Univ., Stanford, CA, 1999.
17. Y. Taur and D. S. Zicherman et al., "A new 'shift and ratio' method for MOSFET channel-length extraction," IEEE Electron Device Lett., vol. 13, pp. 267-269, 1992.
18. MEDICI, Ver. 1998.4.1, Avant! Corp. and TMA, Inc., 1998.
19. S. Takagi, A. Toriumi, M. Iwase, and H. Tango, "On the universality of inversion layer mobility in Si MOSFET's : Part I-effects of substrate impurity concentration," IEEE Trans. Electron Devices, vol. 41, pp. 2357-2362, 1994.
20. J. P. Dismukes et al., "Thermal and electric properties of heavily doped Ge-Si alloys up to 1300 K," JAppl. Phys., vol. 35, p. 2899, 1964.
21. M. Asheghi, M. N. Touzelbaev, K. E. Goodson, Y. K. Leung, and S. S. Wong, "Temperature-dependent thermal conductivity of single-crystal silicon layers in SOI substrates," Trans. ASME. J. Heat Transf., vol. 120, pp. 30-36, 1998.
22. R. H. Tu et al., "An AC conductance technique for measuring selfheating in SOI MOSFET's," IEEE Electron Device Lett., vol. 16, pp. 67-69, 1995.
23. B. M. Tenbroek, M. S. L. Lee, W. Redman-White, J. T. Bunyan, and M. J. Uren, "Self-heating effects in SOI MOSFET's and their measurement by small signal conductance techniques," IEEE Trans. Electron Devices, vol. 43, pp. 2240-2248, 1996.
24. S. Y. Chou and D. A. Antoniadis, "Relationship between measured and intrinsic transconductances of FETs," IEEE Trans. Electron Devices, vol. ED-34, pp. 448-450, 1987.
25. x structure and its FET performance by computer simulation," IEEE Trans. Electron Devices, vol. 41, pp. 1513-1522, 1994.
26. B. Fischer and K. R. Hofmann, "Full-band Monte Carlo model of electron and hole transport in strained Si including inelastic acoustic phonon scattering," Appl. Phys. Lett., vol. 74, pp. 2185-2187, 1999.
27. J. Song, Y. Park, and H. Min, "Drain current enhancement due to velocity overshoot effects and its analytic modeling," IEEE Trans. Electron Devices, vol. 43, pp. 1870-1875, 1996.
28. H. Hu, J. B. Jacobs, L. T. Su, and D. A. Antoniadis, "A study of deep-submicron MOSFET scaling based on experiment and simulation," IEEE Trans. Electron Devices, vol. 42, pp. 669-677, 1995.
29. A. G. O'Neill and D. A. Antoniadis, "Deep submicron CMOS based on silicon germanium technology," IEEE Trans. Electron Devices, vol. 43, pp. 911-918, 1996.
30. M. Asheghi, private communication.