Improving yield and defect tolerance in multifunction subthreshold CMOS gates

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 2006, Pages 20-28

  Granhaug, Kristian ^a   Aunet, Snorre ^a  

^a UNIVERSITY OF OSLO   (Norway)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT TOLERANCE; MONTE CARLO METHODS; PHASE MATCHING; THRESHOLD VOLTAGE;

DEFECT TOLERANCE; GATE-LEVEL REDUNDANCY; MISMATCH ANALYSIS; MULTIFUNCTION SUBTHRESHOLD CMOS GATES;

CMOS INTEGRATED CIRCUITS;

EID: 38049124903     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFT.2006.35     Document Type: Conference Paper

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