Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs

Journal of Systems Architecture

Volumn 53, Issue 9, 2007, Pages 629-643

  Astarloa, Armando ^a   Zuloaga, Aitzol ^a   Bidarte, Unai ^a   Martín, José Luis ^a   Lázaro, Jesús ^a   Jiménez, Jaime ^a  

^a UNIVERSITY OF THE BASQUE COUNTRY UPV EHU   (Spain)

Author keywords

Dynamic reconfiguration; FPGA; Multiprocessor; Partial reconfiguration; SoC; SoPC

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; NETWORK PROTOCOLS; NETWORK SECURITY;

DYNAMIC RECONFIGURATION; MULTIPROCESSORS; PARTIAL RECONFIGURATION; SELF RECONFIGURATION CONTROL SYSTEM;

CONTROL SYSTEMS;

EID: 34248553602     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2007.01.011     Document Type: Article

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