A reconfigurable SoC architecture for high volume and multi-channel data transaction in industrial environments

IECON Proceedings (Industrial Electronics Conference)

Volumn 3, Issue , 2002, Pages 2322-2327

  Astarloa, Armando ^a   Bidarte, Unai ^a   Zulaoga, Aitzol ^a  

^a UNIVERSITY OF THE BASQUE COUNTRY UPV EHU   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

MULTICHANNEL DATA TRANSACTION; SYSTEM ON CHIP ARCHITECTURE; UPGRADEABLE HARDWARE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; EMBEDDED SYSTEMS; INDUSTRIAL APPLICATIONS; INTEGRATED CONTROL; SEMICONDUCTOR DEVICE MANUFACTURE;

MICROCONTROLLERS;

EID: 0036957967     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IECON.2002.1185335     Document Type: Conference Paper

References (5)

1. SoC Design Challenges: The EDA medea roadmap, J. Borel, from Design of Hardware/Software Embedded Systems, University of Cantabria, 2001.
2. WISHBONE System-on-Chip (SoC) Interconnection Architecture for Portable IP Cores (rev. B.2), Silicore Corporation, Corcoran (USA), October 2001.
3. Writing Testbenches, Functional Verification of HDL models, Janick Bergeron, Kluwer Academic Publishers, Massachusetts, 2000.
4. Spartan-II 2.5V FPGA Family Datasheet, Xilinx Inc., 2001.
5. Xilinx Application Notes, Configuring Spartan-II FPGAs from Parallel EPROMs, Xilinx Inc., 2001.