Multiprocessor SoPC-core for FAT volume computation

Microprocessors and Microsystems

Volumn 29, Issue 10, 2005, Pages 421-434

  Astarloa, Armando ^a   Bidarte, Unai ^a   Lázaro, Jesús ^a   Zuloaga, Aitzol ^a   Arias, Jagoba ^a  

^a UNIVERSITY OF THE BASQUE COUNTRY UPV EHU   (Spain)

Author keywords

Co design; FPGA; IP Core; SoPC; VHDL

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER PERIPHERAL EQUIPMENT; COMPUTER SIMULATION; FIELD PROGRAMMABLE GATE ARRAYS; INTERFACES (COMPUTER); STANDARDS; VIRTUAL REALITY;

CO-DESIGNS; IP CORE; SOPC; VHDL;

MULTIPROCESSING SYSTEMS;

EID: 27344447766     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.micpro.2005.01.001     Document Type: Article

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