-
1
-
-
85032751407
-
Energy-efficient DSPs for wireless sensor networks
-
Jul
-
A. Wang and A. P. Chandrakasan, "Energy-efficient DSPs for wireless sensor networks," IEEE Signal Process. Mag, vol. 19, no. 4, pp. 68-78, Jul. 2002.
-
(2002)
IEEE Signal Process. Mag
, vol.19
, Issue.4
, pp. 68-78
-
-
Wang, A.1
Chandrakasan, A.P.2
-
2
-
-
0035242946
-
Vibration-to-electric energy conversion
-
Feb
-
S. Meninger, J. O. Mur-Miranda, R. Amirtharajah, A. Chandrakasan, and J. H. Lang, "Vibration-to-electric energy conversion," IEEE Trans. Very Large Scale Integration (VLSI), vol. 9, no. 2, pp. 64-76, Feb. 2001.
-
(2001)
IEEE Trans. Very Large Scale Integration (VLSI)
, vol.9
, Issue.2
, pp. 64-76
-
-
Meninger, S.1
Mur-Miranda, J.O.2
Amirtharajah, R.3
Chandrakasan, A.4
Lang, J.H.5
-
3
-
-
0036116743
-
PicoRadios for wireless sensor networks: The next challenge in ultra-low power design
-
San Francisco, CA, Feb
-
J. Rabaey, J. Ammer, T. Karalar, S. Li, B. Otis, M. Sheets, and T. Tuan, "PicoRadios for wireless sensor networks: the next challenge in ultra-low power design," in IEEE ISSCC 2002 Dig. Tech. Papers, San Francisco, CA, Feb. 2002, pp. 200-201.
-
(2002)
IEEE ISSCC 2002 Dig. Tech. Papers
, pp. 200-201
-
-
Rabaey, J.1
Ammer, J.2
Karalar, T.3
Li, S.4
Otis, B.5
Sheets, M.6
Tuan, T.7
-
4
-
-
3042796528
-
On ambient energy sources for powering indoor electronic devices,
-
Ph.D. dissertation, Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland, May
-
J. F. Randall, "On ambient energy sources for powering indoor electronic devices," Ph.D. dissertation, Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland, May 2003.
-
(2003)
-
-
Randall, J.F.1
-
5
-
-
1242263410
-
A micropower programmable DSP using approximate signal processing based on distributed arithmetic
-
Feb
-
R. Amirtharajah and A. P. Chandrakasan, "A micropower programmable DSP using approximate signal processing based on distributed arithmetic," IEEE J. Solid-State Circuits, vol. 39, no. 2, pp. 337-347, Feb. 2004.
-
(2004)
IEEE J. Solid-State Circuits
, vol.39
, Issue.2
, pp. 337-347
-
-
Amirtharajah, R.1
Chandrakasan, A.P.2
-
6
-
-
0027940828
-
Low-power design: Ways to approach the limits
-
San Francisco, CA
-
E. A. Vittoz, "Low-power design: Ways to approach the limits," in IEEE ISSCC 1994 Dig. Tech. Papers, San Francisco, CA, 1994, pp. 14-18.
-
(1994)
IEEE ISSCC 1994 Dig. Tech. Papers
, pp. 14-18
-
-
Vittoz, E.A.1
-
7
-
-
0347637611
-
On physical models of neural computation and their analog VLSI implementation
-
Nov
-
A. G. Andreou, "On physical models of neural computation and their analog VLSI implementation," in Proc. Workshop on Physics and Computation, Nov. 1994, pp. 255-264.
-
(1994)
Proc. Workshop on Physics and Computation
, pp. 255-264
-
-
Andreou, A.G.1
-
8
-
-
0029403792
-
A low-power VLSI arrhythmia classifier
-
Nov
-
P. Leong and M. Jabri, " A low-power VLSI arrhythmia classifier," IEEE Trans. Neural Networks, vol. 6, no. 6, pp. 1435-1445, Nov. 1995.
-
(1995)
IEEE Trans. Neural Networks
, vol.6
, Issue.6
, pp. 1435-1445
-
-
Leong, P.1
Jabri, M.2
-
9
-
-
63649141058
-
Analog pattern classifier with flexible matching circuitry based on principal-axis-projection vector representation
-
Sep
-
T. Yamasaki, K. Yamamoto, and T. Shibata, "Analog pattern classifier with flexible matching circuitry based on principal-axis-projection vector representation," in Proc. 27th Eur. Solid-State Circuits Conf. (ESSCIRC 2001), Sep. 2001, pp. 197-200.
-
(2001)
Proc. 27th Eur. Solid-State Circuits Conf. (ESSCIRC 2001)
, pp. 197-200
-
-
Yamasaki, T.1
Yamamoto, K.2
Shibata, T.3
-
10
-
-
0032268116
-
BiCMOS circuits for analog Viterbi decoders
-
Dec
-
M. S. Shakiba, D. A. Johns, and K. W. Martin, "BiCMOS circuits for analog Viterbi decoders," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 45, no. 12, pp. 1527-1537, Dec. 1998.
-
(1998)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.45
, Issue.12
, pp. 1527-1537
-
-
Shakiba, M.S.1
Johns, D.A.2
Martin, K.W.3
-
11
-
-
0031208275
-
A micropower analog circuit implementation of hidden Markov model state decoding
-
Aug
-
J. Lazzaro, J. Wawrzynek, and R. P. Lippmann, "A micropower analog circuit implementation of hidden Markov model state decoding," IEEE J. Solid-State Circuits, vol. 32, no. 8, pp. 1200-1209, Aug. 1997.
-
(1997)
IEEE J. Solid-State Circuits
, vol.32
, Issue.8
, pp. 1200-1209
-
-
Lazzaro, J.1
Wawrzynek, J.2
Lippmann, R.P.3
-
12
-
-
0032023757
-
Analog VLSI design constraints of programmable cellular neural networks
-
Mar
-
P. Kinget and M. Steyaert, "Analog VLSI design constraints of programmable cellular neural networks," Analog Integr. Circuits Signal Process., vol. 15, no. 3, pp. 251-261, Mar. 1998.
-
(1998)
Analog Integr. Circuits Signal Process
, vol.15
, Issue.3
, pp. 251-261
-
-
Kinget, P.1
Steyaert, M.2
-
13
-
-
0026966646
-
A training algorithm for optimal margin classifier
-
B. Boser, I. Guyon, and V. Vapnik, "A training algorithm for optimal margin classifier," in Proc. 5th Annu. ACM Workshop on Computational Learning Theory, 1992, pp. 144-152.
-
(1992)
Proc. 5th Annu. ACM Workshop on Computational Learning Theory
, pp. 144-152
-
-
Boser, B.1
Guyon, I.2
Vapnik, V.3
-
15
-
-
0035493792
-
Charge-mode parallel architecture for vector-matrix multiplication
-
OCt
-
R. Genov and G. Cauwenberghs, "Charge-mode parallel architecture for vector-matrix multiplication," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 48, no. 10, pp. 930-936, OCt. 2001.
-
(2001)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.48
, Issue.10
, pp. 930-936
-
-
Genov, R.1
Cauwenberghs, G.2
-
16
-
-
84898993017
-
Sub-microwatt analog VLSI support vector machine for pattern classification and sequence estimation
-
Cambridge, MA: MIT Press
-
S. Chakrabartty and G. Cauwenberghs, "Sub-microwatt analog VLSI support vector machine for pattern classification and sequence estimation," in Proc. Neural Information Processing Systems Conf. (NIPS'2004). Cambridge, MA: MIT Press, 2005.
-
(2005)
Proc. Neural Information Processing Systems Conf. (NIPS'2004)
-
-
Chakrabartty, S.1
Cauwenberghs, G.2
-
17
-
-
84958744857
-
Forward decoding kernel machines: A hybrid HMM/SVM approach to sequence recognition
-
Proc. SVM 2002, pp
-
S. Chakrabartty and G. Cauwenberghs, "Forward decoding kernel machines: A hybrid HMM/SVM approach to sequence recognition," in Proc. SVM 2002, pp. 278-292, Lecture Notes in Computer Science, 2388.
-
Lecture Notes in Computer Science
, vol.2388
, pp. 278-292
-
-
Chakrabartty, S.1
Cauwenberghs, G.2
-
18
-
-
4344632214
-
Margin normalization and propagation in analog VLSI
-
Vancouver, Canada
-
S. Chakrabartty and G. Cauwenberghs, "Margin normalization and propagation in analog VLSI," in Proc. IEEE ISCAS 2004, Vancouver, Canada, 2004, pp. I-901-904.
-
(2004)
Proc. IEEE ISCAS 2004
-
-
Chakrabartty, S.1
Cauwenberghs, G.2
-
19
-
-
84890333427
-
Probability propagation and decoding in analog VLSI
-
Cambridge, MA
-
H.-A. Loeliger, "Probability propagation and decoding in analog VLSI," in Proc. IEEE Int. Symp. Information Theory, Cambridge, MA, 1998, p. 146.
-
(1998)
Proc. IEEE Int. Symp. Information Theory
, pp. 146
-
-
Loeliger, H.-A.1
-
20
-
-
0000696684
-
An analog VLSI decoding technique for digital codes
-
F. Lustenberger, "An analog VLSI decoding technique for digital codes," in Proc. IEEE ISCAS'99, 1999, vol. 2, pp. 424-427.
-
(1999)
Proc. IEEE ISCAS'99
, vol.2
, pp. 424-427
-
-
Lustenberger, F.1
-
22
-
-
0002361722
-
Array-based analog computation
-
May
-
A. Kramer, "Array-based analog computation," IEEE Micro, vol. 16, no. 5, pp. 40-49, May 1996.
-
(1996)
IEEE Micro
, vol.16
, Issue.5
, pp. 40-49
-
-
Kramer, A.1
-
23
-
-
0032186579
-
A 16 × 16 non-volatile programmable analog vector-matrix multiplier
-
A. Aslam-Siddiqi, W. Brockherde, and B. Hosticka, "A 16 × 16 non-volatile programmable analog vector-matrix multiplier," IEEE J. Solid-State Circuits, vol. 31, no. 10, pp. 1502-1509, 1998.
-
(1998)
IEEE J. Solid-State Circuits
, vol.31
, Issue.10
, pp. 1502-1509
-
-
Aslam-Siddiqi, A.1
Brockherde, W.2
Hosticka, B.3
-
24
-
-
0032638030
-
A general translinear principle for subthreshold MOS transistors
-
May
-
T. Serrano-Gotarredona, B. Linares-Barranco, and A. G. Andreou, "A general translinear principle for subthreshold MOS transistors," IEEE Trans. Circuits Syst., I: Fundam. Theory Applicat., vol. 46, no. 5, pp. 607-616, May 1999.
-
(1999)
IEEE Trans. Circuits Syst., I: Fundam. Theory Applicat
, vol.46
, Issue.5
, pp. 607-616
-
-
Serrano-Gotarredona, T.1
Linares-Barranco, B.2
Andreou, A.G.3
-
25
-
-
0016846659
-
Translinear circuits: A proposed classification
-
Jan
-
B. Gilbert, "Translinear circuits: A proposed classification," Electron. Lett., vol. 11, no. 1, pp. 14-16, Jan. 1975.
-
(1975)
Electron. Lett
, vol.11
, Issue.1
, pp. 14-16
-
-
Gilbert, B.1
-
26
-
-
0030285698
-
A single-transistor silicon synapse
-
Nov
-
C. Diorio, P. Hasler, B. Minch, and C. A. Mead, "A single-transistor silicon synapse," IEEE Trans. Electron Devices, vol. 43, no. 11, pp. 1972-1980, Nov. 1996.
-
(1996)
IEEE Trans. Electron Devices
, vol.43
, Issue.11
, pp. 1972-1980
-
-
Diorio, C.1
Hasler, P.2
Minch, B.3
Mead, C.A.4
-
27
-
-
0030102060
-
Translinear circuits in subthreshold MOS
-
Mar
-
A. Andreou and K. Boahen, "Translinear circuits in subthreshold MOS," J. Analog Integrated Circuits Signal Process., vol. 9, no. 2, pp. 141-166, Mar. 1996.
-
(1996)
J. Analog Integrated Circuits Signal Process
, vol.9
, Issue.2
, pp. 141-166
-
-
Andreou, A.1
Boahen, K.2
-
28
-
-
27944492851
-
A functional MOS transistor featuring gate-level weighted sum and threshold operations
-
Jun
-
T. Shibata and T. Ohmi, "A functional MOS transistor featuring gate-level weighted sum and threshold operations," IEEE Trans. Electron Devices, vol. 39, no. 6, pp. 1444-1455, Jun. 1992.
-
(1992)
IEEE Trans. Electron Devices
, vol.39
, Issue.6
, pp. 1444-1455
-
-
Shibata, T.1
Ohmi, T.2
-
30
-
-
84857357345
-
White noise in MOS transistors and resistors
-
Nov
-
R. Sarpeshkar, T. Delbruck, and C. A. Mead, "White noise in MOS transistors and resistors," IEEE Circuits Devices Mag., vol. 9, no. 6, pp. 23-29, Nov. 1993.
-
(1993)
IEEE Circuits Devices Mag
, vol.9
, Issue.6
, pp. 23-29
-
-
Sarpeshkar, R.1
Delbruck, T.2
Mead, C.A.3
-
31
-
-
25144514874
-
Modeling and sizing for minimum energy operation in subthreshold circuits
-
Sep
-
B. H. Calhoun, A. Wang, and A. Chandrakasan, "Modeling and sizing for minimum energy operation in subthreshold circuits," IEEE J. Solid-State Circuits, vol. 40, no. 9, pp. 1778-1786, Sep. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.9
, pp. 1778-1786
-
-
Calhoun, B.H.1
Wang, A.2
Chandrakasan, A.3
-
32
-
-
33847153046
-
Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method
-
A. Bandyopadhyay, G. J. Serrano, and P. Hasler, "Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method," in Proc. IEEE ISCAS 2005, pp. 2148-2151.
-
Proc. IEEE ISCAS 2005
, pp. 2148-2151
-
-
Bandyopadhyay, A.1
Serrano, G.J.2
Hasler, P.3
-
33
-
-
34247477149
-
Fixed current method for programming large floating gate arrays
-
S. Chakrabartty and G. Cauwenberghs, "Fixed current method for programming large floating gate arrays," in IEEE ISCAS 2005, pp. 3934-3937.
-
(2005)
IEEE ISCAS
, pp. 3934-3937
-
-
Chakrabartty, S.1
Cauwenberghs, G.2
-
34
-
-
0041695254
-
On the design and characterization of femtoampere current-mode circuits
-
Aug
-
B. Linares-Barranco and T. Serrano-Gotarredona, "On the design and characterization of femtoampere current-mode circuits," IEEE J. Solid State Circuits, vol. 38, no. 8, pp. 1353-1363, Aug. 2003.
-
(2003)
IEEE J. Solid State Circuits
, vol.38
, Issue.8
, pp. 1353-1363
-
-
Linares-Barranco, B.1
Serrano-Gotarredona, T.2
-
35
-
-
34247481319
-
-
Online, Available
-
Gini-SVM Toolkit. [Online]. Available: http://bach.ece.jhu.edu/svm/ ginisvm
-
Toolkit
-
-
Gini-SVM1
|