-
1
-
-
0031191573
-
Self learning analog neural network LSI with high-resolution nonvolatile analog memory and a partially serrial weight-update architecture
-
T. Morie, O. Fujita, and K. Uchimura, "Self learning analog neural network LSI with high-resolution nonvolatile analog memory and a partially serrial weight-update architecture," IEICE Trans. Electron, vol. E80-C, no. 7, pp. 990-995, 1997.
-
(1997)
IEICE Trans. Electron
, vol.E80-C
, Issue.7
, pp. 990-995
-
-
Morie, T.1
Fujita, O.2
Uchimura, K.3
-
2
-
-
0031703348
-
A 1M-cell 6b/cell analog flash memory for digital storage
-
P. L. Rolandi, R. Canegallo, E. Chioffi, D. Gerna, C. Issartel, F. Lhermet, M. Passotti, and A. Kramer, "A 1M-cell 6b/cell analog flash memory for digital storage," IEEE Int. Solid-State Circuits Conference, pp. 334-335, 1998.
-
(1998)
IEEE Int. Solid-State Circuits Conference
, pp. 334-335
-
-
Rolandi, P.L.1
Canegallo, R.2
Chioffi, E.3
Gerna, D.4
Issartel, C.5
Lhermet, F.6
Passotti, M.7
Kramer, A.8
-
3
-
-
0038529372
-
A 300-MS/s 14-bit digital-to-analog converter in logic cmos
-
May
-
J. Hyde, T. Humes, C. Diorio, M. Thomas, and M. Figueroa, "A 300-MS/s 14-bit digital-to-analog converter in logic cmos," IEEE Journal of Solid-State Circuits, vol. 38, pp. 734-740, May 2003.
-
(2003)
IEEE Journal of Solid-State Circuits
, vol.38
, pp. 734-740
-
-
Hyde, J.1
Humes, T.2
Diorio, C.3
Thomas, M.4
Figueroa, M.5
-
4
-
-
0242527300
-
A fully programmable CMOS block matrix transform imager architecture
-
San Jose, CA
-
A. Bandyopadhyay and P. Hasler, "A fully programmable CMOS block matrix transform imager architecture," in Proceedings of the Custom Integrated Circuits Conference, San Jose, CA, 2003, pp. 2233-2236.
-
(2003)
Proceedings of the Custom Integrated Circuits Conference
, pp. 2233-2236
-
-
Bandyopadhyay, A.1
Hasler, P.2
-
5
-
-
36849097956
-
Fowlernordheim tunneling into thermally grown sio
-
M. Lenzlinger and E. Snow, "Fowlernordheim tunneling into thermally grown sio," Journal of Applied Physics, vol. 40, no. 6, pp. 278-283, 1969.
-
(1969)
Journal of Applied Physics
, vol.40
, Issue.6
, pp. 278-283
-
-
Lenzlinger, M.1
Snow, E.2
-
6
-
-
84886448075
-
Performance and reliability evaluations of p-channel flash memories with different programming schemes
-
S. Chung, S. Kuo, C. Yih, and T. Chao, "Performance and reliability evaluations of p-channel flash memories with different programming schemes," IEDM Tech. Dig., pp. 295-298, 1997.
-
(1997)
IEDM Tech. Dig
, pp. 295-298
-
-
Chung, S.1
Kuo, S.2
Yih, C.3
Chao, T.4
-
7
-
-
0035429465
-
A PWM analog memory programming circuit for floating-gate MOSFETs with 75-μs programming time and 11-bit updating resolution
-
May
-
S. Kinoshita, T. Morie, M. Nagata, and A. Iwata, "A PWM analog memory programming circuit for floating-gate MOSFETs with 75-μs programming time and 11-bit updating resolution," IEEE Journal of Solid-State Circuits, vol. 36, pp. 1286-1290, May 2003.
-
(2003)
IEEE Journal of Solid-State Circuits
, vol.36
, pp. 1286-1290
-
-
Kinoshita, S.1
Morie, T.2
Nagata, M.3
Iwata, A.4
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