Margin normalization and propagation in analog VLSI

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2004, Pages

  Chakrabartty, Shantanu ^a   Cauwenberghs, Gert ^a  

^a Johns Hopkins University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; DECODING; GRAPH THEORY; MOSFET DEVICES; PROBABILITY; SET THEORY; VECTORS;

NETWORK OPERATIONS; PROBABILITY PROPAGATION; SUPPORT VECTOR MACHINES (SVM);

VLSI CIRCUITS;

EID: 4344632214     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

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2. Lustenberger, F., Helfenstein, M. et. al, "An Analog VLSI Decoding Technique For Digital Codes", Proc. IEEE Int. Symp. Circuits and Systems, pp. 424-427, vol.2 1999
3. Lustenberger, F., and Loeliger H-A, "On Mismatch Errors in Analog-VLSI Error Correcting Decoders", Proc. IEEE Int. Symp. Circuits and Systems, pp. 198-201, vol.4 2001
4. Moerz, M., Gabara, T and Hagenauer, J, "An Analog 0.5μ BiCMOS tailbiting MAP decoder", Solid-State Circuits Conference, 2000, ISSCC, pp. 356-357, Feb 2000
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8. Chakrabartty, S. and Cauwenberghs, G. "Power Dissipation Limits and Large Margin in Wireless Sensors," Proc. IEEE Int. Symp. Circuits and Systems, Bangkok, Thailand 2003.
9. Cover T.A, Thomas J.A, Elements of Information Theory, John Wiley and Sons, 1991.