Analog pattern classifier with flexible matching circuitry based on principal-axis-projection vector representation

European Solid-State Circuits Conference

Volumn , Issue , 2001, Pages 197-200

  Yamasaki, T ^a   Yamamoto, K ^a   Shibata, T ^b  

^a School of Engineering   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE MATCHING; CAPACITANCE COUPLING; FLEXIBLE MATCHING; FLEXIBLE PATTERNS; IMAGE REPRESENTATIONS; PROJECTION METHOD; SIMILARITY EVALUATION; VECTOR REPRESENTATIONS;

CMOS INTEGRATED CIRCUITS; FLEXIBLE ELECTRONICS; IMAGE MATCHING; PATTERN MATCHING;

ANALOG CIRCUITS;

EID: 63649141058     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. M. Yagi, M. Adachi and T. Shibata, "A Hardware-Friendly Soft-Computing Algorithm for Image Recognition," Proc. 10th EUSIPCO 2000, Vol. 2, pp. 729-732, Tampere, Finland, Sep. 4-8, 2000
2. T. Yamasaki and T. Shibata, "An Analog Similarity Evaluation Circuit Featuring Variable Functional Forms," to be published in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, 2001
3. J. Anderson, J. C. Platt, and D. B. Kirk, "An Analog VLSI Chip for Radial Basis Functions," in S. J. Hanson, J. D. Cowan, and C. L. Giles Eds., Advances in Neural Information Processing Systems, San Maetro, CA; Morgan Kaufmann, vol. 5, pp. 765-772. , 1993.
4. L. Theogarajan and L. A. Akers, "A Multi-Dimentional Analog Gaussian Radial Basis Circuit," in Proc. IEEE Int. Symp. Circuits Syst., part 3, Atlanta, GA, USA, 1996.
5. T. Shitaba and T. Ohmi, "A Functional MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operations," IEEE Trans. ED, vol. 39, No. 6, pp.1444-1455, 1992.