Evidence for bulk trap generation during NBTI phenomenon in pMOSFETs with ultrathin SiON gate dielectrics

IEEE Transactions on Electron Devices

Volumn 53, Issue 1, 2006, Pages 51-55

  Tsujikawa, Shimpei ^b   Yugami, Jiro ^a,b  

^a IEEE

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

Bulk trap; Interface trap; Negative bias temperature instability (NBTI); pMOS; Recovery; Stress induced leakage current (SILC); Thin gate dielectric; Time dependant dielectric breakdown (TDDB)

Indexed keywords

ELECTRIC BREAKDOWN; ELECTRON TUNNELING; HYDROGEN; LEAKAGE CURRENTS; SEMICONDUCTING SILICON; STRESS ANALYSIS;

BULK TRAPS; INTERFACE TRAPS; NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI); STRESS-INDUCED LEAKAGE CURRENT (SILC); THIN GATE DIELECTRICS; TIME-DEPENDANT DIELECTRIC BREAKDOWN (TDDB);

GATE DIELECTRICS;

EID: 33947698378     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.860653     Document Type: Article

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