A 0.5-V 74-dB SNDR 25-kHz continuous-time delta-sigma modulator with a return-to-open DAC

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 3, 2007, Pages 496-506

  Pun, Kong Pang ^a,b   Chatterjee, Shouri ^c   Kinget, Peter R ^a,c  

^a IEEE   (Hong Kong)

^b CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

^c Columbia University ^*  (United States)

Author keywords

Body input circuit; Continuous time delta sigma modulator; Return to zero signaling; Ultra low voltage circuit

Indexed keywords

BODY-INPUT CIRCUITS; CONTINUOUS-TIME DELTA-SIGMA MODULATORS; RETURN-TO-ZERO SIGNALING; ULTRA-LOW-VOLTAGE CIRCUIT;

BANDWIDTH; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; FEEDBACK; VOLTAGE CONTROL;

MODULATORS;

EID: 33847741683     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.891716     Document Type: Article

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