A 1.2 V, 38 μW second-order ΔΣ modulator with signal adaptive control architecture

Proceedings of the IEEE 2nd Dallas CAS Workshop on Low Power/Low Voltage Mixed-Signal Circuits and Systems, DCAS 2001

Volumn , Issue , 2001, Pages P23-P26

  Li, Qunying ^a   Van Der Spiegel, J ^b   Laker, K R ^b  

^a TEXAS INSTRUMENTS   (United States)

^b UNIVERSITY OF PENNSYLVANIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE CONTROL SYSTEMS; CMOS INTEGRATED CIRCUITS; ELECTRIC SIGNAL SYSTEMS; INTEGRATED CIRCUITS; LOW POWER ELECTRONICS; MODULATORS; RECONFIGURABLE HARDWARE;

ADAPTIVE CONTROL; ADAPTIVE CONTROL ARCHITECTURE; DELTA SIGMA MODULATOR; DYNAMIC RANGE; NYQUIST RATE; PROPOSED ARCHITECTURES; SECOND ORDERS; STANDARD CMOS TECHNOLOGY;

MIXED SIGNAL INTEGRATED CIRCUITS;

EID: 0012156586     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DCAS.2001.920987     Document Type: Conference Paper

References (5)

1. V. Peluso, P. Vancorenland, A. Marques, M. Steyaert, and W. Sansen, "A 900 mV - 40μW ΔΣ modulator with 77 db dynamic range," Proc. ISSCC, San Francisco, CA, Feb. 1998.
2. A. Baschirotto and R. Castello, "A 1 V 1.8-MHz CMOS Switched-Opamp SC Filter with Rail-to-Rail Output Swing," IEEE J. of Solid-State Circuits, 32(12):1979-1986, December 1997.
3. A. M. Abo and P. R. Gray, "A 1.5 V, 10-bit, 14.3MS/s CMOS Pipeline Analog-to-Digital Converter," IEEE J. of Solid-State Circuits, 34(5):599-606, May 1999.
4. Q. Li, J. Van der Spiegel and K. R. Laker, "Signal Adapative Control Architecture for ΔΣ Modulator Design," IEE Electronics Letters, 35(8):610-611, April 1999.
5. G. Yin and W. Sansen, "A high frequency and high-resolution fourth-order ΣΔ A/D converter in BiCMOS technology," IEEE J. of Solid-State Circuits, 29(8):857-865, August 1994.