Synthesis and analysis of sigma-delta modulators employing continuous-time filters

Analog Integrated Circuits and Signal Processing

Volumn 23, Issue 2, 2000, Pages 141-152

  Bénabès, Philippe ^a   Keramat, Mansour ^b   Kielbasa, Richard ^a  

^a SUPELEC   (France)

^b SHARIF UNIVERSITY OF TECHNOLOGY   (Iran)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; ELECTRIC NETWORK SYNTHESIS; LOW PASS FILTERS; MATHEMATICAL MODELS;

CONTINUOUS-TIME FILTERS; LOWPASS SIGMA-DELTA CONVERTERS;

DELTA SIGMA MODULATION;

EID: 0343006798     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1008346026468     Document Type: Article

References (21)

1. J. C. Candy and G. C. Ternes, Over sampling Delta-Sigma Data Converters. IEEE Press, New York, 1991.
2. S. R. Norsworthy, R. Schreier, and G. C. Ternes, Delta-Sigma Data Converters, Theory, Design, and Simulation. IEEE Press, PC3954, 1997.
3. B. Agrawal and L. Shenoi, "Design methodology for sigma-delta modulators." IEEE Transactions Communications 31, pp. 360-369, 1983.
4. P. Benabes, "New bandpass sigma-delta modulators." Ph.D. dissertation, Service des Mesures, SUPELEC, Paris, France, 1994 (in French).
5. P. Benabes, A. Gauthier, and R. Kielbasa, "A Multistage Closed-Loop Sigma-Delta Modulator (MSCL)." Analog Integrated Circuits and Signal Processing 11(3), pp. 195-204, 1996.
6. C. V. Chakravarthy and M. N. Faruqui, "Two loop adaptive delta modulation systems." IEEE Transactions Communications 22, pp. 1710-1713, 1974.
7. J. C. Candy, W. H. Ninke, and B. A. Wooley, "A per channel A/D converter having 15-segment μ255 companing." IEEE Transactions Communications. 24, pp. 33-42, 1976.
8. R. J. Van De Plassche and R. E. J. Van Der Grift, "A five digit analog digital converter." IEEE Journal of Solid-State Circuits 12, pp. 656-662, 1977.
9. R. J. Van De Plassche, "A sigma-delta modulator as an A/D converter." IEEE Transactions Circuits & Systems 25, pp. 510-514, 1978.
10. C. V. Chakravarthy, "A class of companded unity bit coders." IEEE Transactions Communications 30, pp. 1773-1775, 1982.
11. R. Koch, B. Heise, F. Eckbauer, E. Engelhardt, J. A. Fisher, and F. Parzefall, "A 12 bit ΣΔ analog-to-digital converter with a 15 MHz clock rate." IEEE Journal of Solid-State Circuits 21, pp. 1003-1010, 1986.
12. J. F. Jensen, A. E. Cosand, and R. H. Walden, "A 3.2-GHz second-order delta-sigma modulator implemented in InP HBT Technology." IEEE Journal of Solid State Circuits 30, pp. 103-106, 1995.
13. A. Gosslau and A. Gottwald, "Optimization of a ΣΔ modulator by the use of a slow ADC." in Proceedings IEEE International Symposium. Circuits & Systems, pp. 2317-2320, 1988.
14. R. Schreier and B. Zhang, "Delta-Sigma modulators employing continuous-time circuitry." IEEE Transactions Circuit & Systems-I: Fundamental Theory and Applications 43, pp. 324-332, 1996.
15. O. Shoaei, Continuous-time delta-sigma A/D converters for high speed applications, Ph.D. dissertation, Carleton University, Canada, 1995.
16. M. B. Monagan, K. O. Geddes, K. M. Heal, G. Labahn, and S. Vorloetter, Maple V Programming Guide. Springer-Verlag, 1996.
17. Users Guide Mathematica: System for Doing Mathematics by Computer. Wolfram Research.
18. G. F. Franklin and J. P. Powell, Digital Control of Dynamic Systems. Addison-Wesley Publishing Company, 1980.
19. J. C. Candy, "A use of double integration in sigma delta modulation." IEEE Transactions Communications 33, pp. 249-258, 1985.
20. P. Benabes, M. Keramat, and R. Kielbasa, Synthesis and analysis of sigma-delta modulators employing continuous-time filters. Ecole Superieure d'Electricite (SUPELEC), Paris, France, Tech. Rep. No. SUP-0996-21, 1996.
21. P. Benabes, P. Aldebert, and R. Kielbasa, "A Matlab based tool for bandpass continuous-time sigma-delta modulators design." in Proceedings IEEE International Symposium Circuits & Systems Monterey, CA, 6, pp. 274-277, 1998.