A 3.3-mW ΣΔ modulator for UMTS in 0.18-μm CMOS with 70-dB dynamic range in 2-MHz bandwidth

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 12, 2002, Pages 1645-1652

  Van Veldhoven, Robert H M ^a   Minnis, Brian J ^a   Hegt, Hans A ^b   Van Roermund, Arthur H M ^b  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

ADC; 1.5 b converter; Telecommunication receiver; UMTS

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; HARMONIC DISTORTION; MOBILE TELECOMMUNICATION SYSTEMS; MODULATORS; PHASE LOCKED LOOPS;

UNIVERSAL MOBILE TELECOMMUNICATION SYSTEM (UMTS);

CMOS INTEGRATED CIRCUITS;

EID: 0036917745     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.804329     Document Type: Conference Paper

References (5)

1. "3rd-Generation Partnership Project, TSG RAN WG4, UE Radio transmission and reception (FDD), Release 1999,", 3GPP TS 25.101 V3.7.0, 2001-06.
2. E.J. van der Zwan and E.C. Dijkmans, "A 0.2 mW CMOS ΣΔ modulator for speech coding," IEEE J. Solid-State Circuits, pp. 1873-1880, Dec. 1996.
3. L.J. Breems, Continuous-Time Sigma-Delta Modulation for A/D Conversion in Radio Receivers. Boston, MA: Kluwer, 2001.
4. E.J. van der Zwan, K. Philips, and C.A.A. Bastiaansen, "A 10.7 MHz IF-to-baseband ΣΔ A/D conversion system for AM/FM radio receivers," IEEE J. Solid-State Circuits, pp. 1810-1819, Dec. 2000.
5. R.W. Adams, "Design and implementation of an audio 18-bit A-to-D converter using oversampling techniques," J. Audio Eng. Soc., vol. 34, no. 3, pp. 153-166, Mar. 1986.