On-chip logic minimization

Proceedings - Design Automation Conference

Volumn , Issue , 2003, Pages 334-337

  Lysecky, Roman ^a   Vahid, Frank ^a,b  

^a University of California   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Dynamic optimization; Embedded systems; Logic minimization; On chip logic minimization; On chip synthesis; System on a chip

Indexed keywords

DATA STORAGE EQUIPMENT; DATA TRANSFER; EMBEDDED SYSTEMS; LOGIC CIRCUITS; NETWORK PROTOCOLS; OPTIMIZATION; REAL TIME SYSTEMS; ROUTERS;

LOGIC MINIMIZATION;

LOGIC DESIGN;

EID: 0043136718     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/775914.775918     Document Type: Conference Paper

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