Hardware/software partitioning of software binaries: A case study of H.264 decode

CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis

Volumn , Issue , 2005, Pages 285-290

  Stitt, Greg ^a   Vahid, Frank ^a,b   McGregor, Gordon ^c   Einloth, Brian ^c  

^a Department of Computer Science and Engineering ^*  (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

Binaries; Embedded systems; FPGA; H.264; Hardware software partitioning; Synthesis

Indexed keywords

BINARIES; H.264; HARDWARE/SOFTWARE PARTITIONING;

ALGORITHMS; DECODING; EMBEDDED SYSTEMS; ERROR ANALYSIS; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE CODING; SYNTHESIS (CHEMICAL); SYSTEMS ANALYSIS;

COMPUTER SOFTWARE;

EID: 27644517741     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

1. C. Scott Ananian. SiliconC: A Hardware Backend for SUIF. http://flex-compiler.lcs.mit.edu/SiliconC.
2. W. Böhm, J. Hammes, B. Draper, M. Chawathe, C. Ross, R. Rinker, and W. Najjar. Mapping a Single Assignment Programming Language to Reconfigurable Systems. The Journal of Supercomputing, vol. 21, pp. 117-130, 2002.
3. D. Burger and T.M. Austin. The SimpleScalar Tool Set, Version 2.0. University of Wisconsin-Madison Computer Sciences Department Technical Report #1342. June, 1997.
4. CatapultC. http://www.mentor.com/products/c-based_design/
5. C. Cifuentes, M. Van Emmerik, D.Ung, D. Simon, T. Waddington. Preliminary Experiences with the Use of the UQBT Binary Translation Framework. Proceedings of the Workshop on Binary Translation, Newport Beach, USA, October 1999.
6. CriticalBlue. http://www.criticalblue.com.
7. P. Eles, Z. Peng, K. Kuchchinski and A. Doboli. System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search. Kluwer's Design Automation for Embedded Systems, vol2, no l, pp. 5-32, Jan 1997.
8. A. Fin, F. Fummi, M. Signoretto. SystemC: A Homogenous Environment to Test Embedded Systems. CODES 2001.
9. Freescale Semiconductor, http://www.freescale.com/.
10. J. Henkel. A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded Systems. Proceedings of the 36th ACM/IEEE conference on Design automation conference, pp. 122-127, June 1999.
11. G. Mittal, D. Zaretsky, X. Tang and P. Banerjee. Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs. IEEE Symposium on Field-Programmable Custom Computing Machines. April 2004.
12. OXFORD Hardware Compilation Group, The Handel language, Technical Report, Oxford University 1997.
13. G. Stitt, R. Lysecky, F. Vahid. Dynamic Hardware/Software Partitioning: A First Approach. IEEE/ACM 40th Design Automation Conference (DAC), June 2003.
14. G. Stitt and F. Vahid. A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms. Design and Test Europe Conference (DATE), 2005.
15. G. Stitt and F. Vahid. Hardware/Software Partitioning of Software Binaries. IEEE/ACM International Conference on Computer Aided Design, November 2002.
16. XPRES Compiler, http://www.tensilica.com/html/xpres.html.