Exploiting choice: instruction fetch and issue on an implementable simultaneous multithreading processor

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn , Issue , 1996, Pages 191-202

  Tullsen, Dean M ^a   Eggers, Susan J ^a   Emer, Joel S ^a   Levy, Henry M ^a   Lo, Jack L ^a   Stamm, Rebecca L ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER OPERATING PROCEDURES; COMPUTER OPERATING SYSTEMS; COMPUTER SIMULATION; HEURISTIC METHODS; MULTIPROCESSING SYSTEMS; PERFORMANCE; COMPUTER ARCHITECTURE;

INSTRUCTION FETCH; SIMULTANEOUS MULTITHREADING PROCESSOR; SUPERSCALAR DESIGN; THROUGHPUT GAINS; SIMULTANEOUS MULTITHREADING (SMT);

COMPUTER ARCHITECTURE; MULTIPROCESSING SYSTEMS;

EID: 0029666641     PISSN: 08847495     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (30)