Incremental fault diagnosis

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 24, Issue 2, 2005, Pages 240-251

  Liu, Jiang Brandon ^a   Veneris, Andreas ^b  

^a Freescale   (United States)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

Circuit simulation; Fault diagnosis; Open interconnect; Very large scale integration (VLSI)

Indexed keywords

ALGORITHMS; BENCHMARKING; COMPUTER AIDED DESIGN; ELECTRIC FAULT LOCATION; ELECTROMIGRATION; FAILURE ANALYSIS; INTEGRATED CIRCUITS; THERMAL STRESS; VLSI CIRCUITS;

CIRCUIT SIMULATION; FAULT DIAGNOSIS; MASK CONTAMINATION; OPEN-INTERCONNECT;

ELECTRIC FAULT CURRENTS;

EID: 13144256762     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.841070     Document Type: Article

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