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Volumn , Issue , 1997, Pages 548-554

Fault simulation of interconnect opens in digital CMOS circuits

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT OSCILLATIONS; COMPUTER SIMULATION; COMPUTER SOFTWARE; DIGITAL INTEGRATED CIRCUITS; ELECTRIC WIRING; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; VOLTAGE CONTROL;

EID: 0031360690     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.1997.643593     Document Type: Conference Paper
Times cited : (23)

References (20)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.