Design diagnosis using Boolean satisfiability

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2004, Pages 218-223

  Smith, Alexander ^a   Veneris, Andreas ^a   Viglas, Anastasios ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEN SATISFIABILITY; COMPRESSION RATIOS; FAULT DIAGNOSIS; REGISTER-TRANSFER LEVEL (RTL);

ALGORITHMS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; FAILURE ANALYSIS; OPTIMIZATION; PROGRAM DEBUGGING; VECTORS; VLSI CIRCUITS;

BOOLEAN ALGEBRA;

EID: 2442490026     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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