Effects of annealing on charge in HfO2 gate stacks

IEEE Electron Device Letters

Volumn 26, Issue 1, 2005, Pages 20-22

  Zhang, Z ^a   Li, M ^a   Campbell, S A ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

Annealing; Charge; Gate dielectric; HfO2; High k; Metal gate electrode; Work function

Indexed keywords

ANNEALING; DEPOSITION; DIELECTRIC DEVICES; ELECTRIC CHARGE; ELECTRODES; ELECTRONIC DENSITY OF STATES; HAFNIUM COMPOUNDS; HIGH TEMPERATURE OPERATIONS; INTERFACES (MATERIALS); OXIDATION; THERMAL EFFECTS;

CHARGE DENSITIES; GATE DIELECTRIC; GATE STACKS; METAL GATE ELECTRODE; STACK INTERFACES; WORK FUNCTION;

GATES (TRANSISTOR);

EID: 12444335744     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2004.840016     Document Type: Article

References (16)

1. G. D. Wilk, R. M. Wallace, and J. M. Anthony, "High-Κ gate dielectrics: Current status and materials properties considerations," J. Appl. Phys., vol. 89. no. 10, pp. 5243-5275, May 2001.
2. H.-S. P. Wong, "Beyond the conventional transistor," IBM J. Res. & Dev., vol. 46, no. 2/3, pp. 133-168, Mar./May 2002.
3. T. Ma, S. A. Campbell, R. Smith, N. Hoilien. B. He, W. L. Gladfelter, C. Hobbs, D. Buchanan, C. Taylor, M. Gribelyuk, M. Tiner, M. Coppel, and J. J. Lee, "Group IVB metal oxides high permittivity gate insulators deposited from anhydrous metal nitrates," IEEE Trans. Electron Devices, vol. 48, no. 10, pp. 2348-2356, Oct. 2001.
4. 2 dielectrics," IEEE Trans. Electron Devices, vol. 44, no. 1, pp. 104-109, Jan. 1997.
5. M. V. Fischetti, D. A. Neumayer, and E. A. Cartier, "Effective electron mobility in Si inversion layers in metal-oxide-semiconductor systems with a high-Κ insulator: The role of remote phonon scattering," J. Appl. Phys., vol. 90, no. 9, pp. 4587-4608, Nov. 2001.
6. C. C. Hobbs, L. R. C. Fonseca, A. Knizhnik, V. Dhandapani, S. B. Samavedam, W. J. Taylor, J. M. Grant, L. G. Dip, D. H. Triyoso, R. I. Hegde, D. C. Gilmer, R. Garcia, D. Roan, M. L. Lovejoy, R. S. Rai, E. A. Hebert, H.-H. Tseng, S. G. H. Anderson, B. E. White, and P. J. Tobin, "Fermi-level pinning at the polysilicon/metal oxide interface - Part I," IEEE Trans. Electron Devices, vol. 51, no. 6. pp. 971-977, Jun. 2004.
7. C. C. Hobbs, L. R. C. Fonseca, A. Knizhnik, V. Dhandapani, S. B. Samavedam, W. J. Taylor, J. M. Grant, L. G. Dip, D. H. Triyoso, R. I. Hegde, D. C. Gilmer, R. Garcia, D. Roan, M. L. Lovejoy, R. S. Rai, E. A. Hebert, H.-H. Tseng, S. G. H. Anderson, B. E. White, and P. J. Tobin, "Fermi-level pinning at the polysilicon/metal oxide interface - Part II," IEEE Trans. Electron Devices, vol. 51, no. 6, pp. 978-984, Jun. 2004.
8. CRC Handbook of Chemistry and Physics, 84 ed., 2003-2004, pp. 9-54-9-55.
9. J. R. Hauser and K. Ahmed, "Characterization of ultra-thin oxides using electrical C-V and I-V measurements," in Proc. AIP Conf., 1998, pp. 235-239.
10. R. Jha, J. Gurganos, Y. H. Kim, R. Choi, J. Lee. and V. Misra, "A capacitance-based methodology for work function extraction of metals on high-Κ," IEEE Electron Device Lett., vol. 25, no. 6, pp. 420-423, Jun. 2004.
11. 2 dual layer gate dielectrics," IEEE Electron Device Lett., vol. 24, no. 2, pp. 87-89, Feb. 2003.
12. + poly-Si gates using chemical oxides and optimized post-annealing," in VLSI Symp. Tech. Dig., 2002, pp. 88-89.
13. Y.-C. Yeo, P. Ranade, Q. Lu, R. Lin, T.-J. King, and C. Hu, " Effects of high-Κ dielectrics on the workfunctions of metal and silicon gates," in VLSI Symp. Tech. Dig., 2001, pp. 49-50.
14. E. H. Nicollian and J. R. Brews. Proc. MOS Physics Technology, 1982, pp. 786-791.
15. X. Shi. M. Shriver, Z. Zhang, T. Higman, and S. A. Campbell, "Properties of high-Κ/ultra high purity silicon nitride stacks," J. Vac. Sci. Technol. A, Vac. Surf Films, vol. 22, no. 4, pp. 1146-1151, Jul./Aug. 2004.
16. L.-A. Ragnarsson, N. A. Bojarczuk, J. Karasinski, and S. Guha, "Hall mobility in hafnium oxide based MOSFETs: Charge effects," IEEE Electron Device Lett., vol. 24, no. 11, pp. 689-691, Nov. 2003.