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Volumn 30, Issue 1, 2002, Pages 108-116

Full-system timing-first simulation

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; COMPUTER OPERATING SYSTEMS; MULTIPROCESSING SYSTEMS; SOFTWARE ENGINEERING; SYSTEMS ANALYSIS;

EID: 0036040311     PISSN: 01635999     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/511399.511349     Document Type: Conference Paper
Times cited : (62)

References (32)
  • 12
    • 0005300696 scopus 로고    scopus 로고
    • Improving the accuracy vs. Speed tradeoff for simulating shared-memory multiprocessors with ILP processors
    • Technical Report TR9802, Rice University
    • (1999)
    • Durbhakula, M.1    Pai, V.S.2    Adve, S.V.3
  • 22
    • 0005313948 scopus 로고    scopus 로고
    • Personal Communication, Oct.
    • (2001)
    • Rajwar, R.1
  • 26
    • 0005379515 scopus 로고    scopus 로고
    • Systems Performance Evaluation Cooperative. SPEC Benchmarks
  • 27
    • 0005340648 scopus 로고    scopus 로고
    • Transaction Processing Performance Council. TPC Benchmark C, Draft Specification, Revision 4.0.q, Aug.
    • (1999)
  • 31
    • 0030129806 scopus 로고    scopus 로고
    • The MIPS. R10000 superscalar microprocessor
    • Apr.
    • (1996) IEEE Micro , vol.16 , Issue.2 , pp. 28-40
    • Yeager, K.C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.