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Volumn 19, Issue 3, 1999, Pages 26-35

Integrated functional performance simulator

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; BUFFER STORAGE; COMPUTATIONAL COMPLEXITY; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; FINITE AUTOMATA; MATHEMATICAL MODELS;

EID: 0032681099     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/40.768499     Document Type: Article
Times cited : (14)

References (16)
  • 1
    • 0032069891 scopus 로고    scopus 로고
    • Calibration of microprocessor performance models
    • May
    • B. Black and JP. Shen, "Calibration of Microprocessor Performance Models," Computer, May 1998, pp. 59-65.
    • (1998) Computer , pp. 59-65
    • Black, B.1    Shen, J.P.2
  • 2
    • 0032313030 scopus 로고    scopus 로고
    • Performance test case generation for microprocessors
    • IEEE Computer Soc., Los Alamitos, Calif., Apr.
    • P. Bose, "Performance Test Case Generation for Microprocessors," Proc. 16th VLSI Test Symp., IEEE Computer Soc., Los Alamitos, Calif., Apr. 1998, pp. 54-59.
    • (1998) Proc. 16th VLSI Test Symp. , pp. 54-59
    • Bose, P.1
  • 3
    • 0029219537 scopus 로고
    • Architectural timing verification of CMOS RISC processors
    • Jan./Mar.
    • P. Bose and S. Surya, "Architectural Timing Verification of CMOS RISC Processors," IBM J. Research and Development, Jan./Mar. 1995, pp. 113-129.
    • (1995) IBM J. Research and Development , pp. 113-129
    • Bose, P.1    Surya, S.2
  • 5
    • 0032075553 scopus 로고    scopus 로고
    • Performance simulation of an alpha microprocessor
    • May
    • M. Reilly and J. Edmondson, "Performance Simulation of an Alpha Microprocessor," Computer, May 1998, pp. 50-58.
    • (1998) Computer , pp. 50-58
    • Reilly, M.1    Edmondson, J.2
  • 6
    • 0029535909 scopus 로고
    • VMW: A visualization based microarchitecture workbench
    • Dec.
    • T.A. Diep and J.P. Shen, "VMW: A Visualization Based Microarchitecture Workbench," Computer, Dec. 1995, pp. 57-64.
    • (1995) Computer , pp. 57-64
    • Diep, T.A.1    Shen, J.P.2
  • 7
    • 0343705584 scopus 로고
    • MW developer's guide
    • ECE Dept., Carnegie Mellon Univ., Pittsburgh, Aug.
    • A.S. Huang and T.A. Diep, "MW Developer's Guide," CMuART Tech. Report 95-1, ECE Dept., Carnegie Mellon Univ., Pittsburgh, Aug. 1995.
    • (1995) CMuART Tech. Report 95-1
    • Huang, A.S.1    Diep, T.A.2
  • 9
    • 0030395192 scopus 로고    scopus 로고
    • Exceeding the dataflow limit via value prediction
    • Dec.
    • M.H. Lipasti and J.P. Shen, "Exceeding the Dataflow Limit via Value Prediction," Proc. MICRO-29, Dec. 1996, pp. 226-237.
    • (1996) Proc. MICRO-29 , pp. 226-237
    • Lipasti, M.H.1    Shen, J.P.2
  • 11
    • 0344076616 scopus 로고    scopus 로고
    • A buffer-oriented methodology for microarchitecture validation
    • Special Issues on Microprocessor Test and Verification, to appear Fall
    • N. Utamaphethai, R.D. Blanton, and J.P. Shen, "A Buffer-Oriented Methodology for Microarchitecture Validation," J. Electronic Testing: Theory and Application, Special Issues on Microprocessor Test and Verification, to appear Fall 1999.
    • (1999) J. Electronic Testing: Theory and Application
    • Utamaphethai, N.1    Blanton, R.D.2    Shen, J.P.3
  • 12
    • 0344507770 scopus 로고    scopus 로고
    • Aug.
    • A. Cagney, "PSIM User's Guide," ftp://cambridge.cygnus.com/pub/psim/index.html, Aug. 1996.
    • (1996) PSIM User's Guide
    • Cagney, A.1
  • 13
    • 0344507767 scopus 로고    scopus 로고
    • Mispredicted path cache effects
    • ECE Dept., Carnegie Mellon Univ., Jan.
    • J. Combs, C. Bechem, and J.P. Shen, "Mispredicted Path Cache Effects," CMuART Tech. Report, ECE Dept., Carnegie Mellon Univ., Jan. 1999.
    • (1999) CMuART Tech. Report
    • Combs, J.1    Bechem, C.2    Shen, J.P.3
  • 14
    • 0029190803 scopus 로고
    • Instruction cache fetch policies for speculative execution
    • IEEE CS Press
    • D. Lee et al., "Instruction Cache Fetch Policies for Speculative Execution," Proc. Int'l Symp. Computer Arch., IEEE CS Press, 1995, pp. 357-367.
    • (1995) Proc. Int'l Symp. Computer Arch. , pp. 357-367
    • Lee, D.1
  • 15
    • 0028089519 scopus 로고
    • The effect of speculative execution of cache performance
    • IEEE CS Press
    • J. Pierce and T. Mudge, "The Effect of Speculative Execution of Cache Performance." Proc. Int'l Parallel Processing Symp., IEEE CS Press, 1994, pp. 172-179.
    • (1994) Proc. Int'l Parallel Processing Symp. , pp. 172-179
    • Pierce, J.1    Mudge, T.2
  • 16
    • 0345369977 scopus 로고
    • Tech. Report, Electrical Engineering and Computer Sci. Dept., Univ. of Michigan, Ann Arbor
    • J. Pierce and T. Mudge, "Wrong Path Instruction Prefetching," Tech. Report, Electrical Engineering and Computer Sci. Dept., Univ. of Michigan, Ann Arbor, 1994.
    • (1994) Wrong Path Instruction Prefetching
    • Pierce, J.1    Mudge, T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.