-
2
-
-
0033579745
-
Analytic model for direct tunneling current in polycrystalline silicon-gate metal-oxide-semiconductor devices
-
Register L.F., Rosenbaum E., Yang K. Analytic model for direct tunneling current in polycrystalline silicon-gate metal-oxide-semiconductor devices. Appl. Phys. Lett. 74(January):1999;457-459.
-
(1999)
Appl. Phys. Lett.
, vol.74
, Issue.JANUARY
, pp. 457-459
-
-
Register, L.F.1
Rosenbaum, E.2
Yang, K.3
-
3
-
-
0032662220
-
Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices
-
Yang N.et al. Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices. IEEE Trans. Electron Devices. 46(July):1999;1464-1471.
-
(1999)
IEEE Trans. Electron Devices
, vol.46
, Issue.JULY
, pp. 1464-1471
-
-
Yang, N.1
-
4
-
-
0001211315
-
Analytic model of direct tunnel current through ultrathin gate oxides
-
Khairurrijalet al. Analytic model of direct tunnel current through ultrathin gate oxides. J. Appl. Phys. 87(March):2000;3000-3005.
-
(2000)
J. Appl. Phys.
, vol.87
, Issue.MARCH
, pp. 3000-3005
-
-
Khairurrijal1
-
5
-
-
0031140867
-
Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET's
-
Lo S.H.et al. Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET's. IEEE Electron Devices Lett. 18(May):1997;209-211.
-
(1997)
IEEE Electron Devices Lett.
, vol.18
, Issue.MAY
, pp. 209-211
-
-
Lo, S.H.1
-
6
-
-
0034317189
-
+ poly-gate PMOSFETs with ultrathin gate oxides
-
+ poly-gate PMOSFETs with ultrathin gate oxides. IEEE Trans. Electron Devices. 47(November):2000;2161-2166.
-
(2000)
IEEE Trans. Electron Devices
, vol.47
, Issue.NOVEMBER
, pp. 2161-2166
-
-
Yang, K.-N.1
-
7
-
-
0004860345
-
Semiconductor thickness and back-gate voltage effects on the gate tunnel current in the MOS/SOI system with an ultrathin oxide
-
Majkusiak B., Badri M.H. Semiconductor thickness and back-gate voltage effects on the gate tunnel current in the MOS/SOI system with an ultrathin oxide. IEEE Trans. Electron Devices. 47(December):2000;2347-2351.
-
(2000)
IEEE Trans. Electron Devices
, vol.47
, Issue.DECEMBER
, pp. 2347-2351
-
-
Majkusiak, B.1
Badri, M.H.2
-
8
-
-
0033324935
-
Extraction of the gate oxide thickness of N- and P-channel MOSFETs below 20Å from the substrate current resulting from valence-band electron tunneling
-
Shanware A.et al. Extraction of the gate oxide thickness of N- and P-channel MOSFETs below 20Å from the substrate current resulting from valence-band electron tunneling. IEDM Tech. Dig. (Dec):1999;815-818.
-
(1999)
IEDM Tech. Dig.
, Issue.DEC
, pp. 815-818
-
-
Shanware, A.1
-
9
-
-
0033725602
-
Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling
-
Lee W.-C., Hu C. Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling. Symp. VLSI Tech. Dig. (June):2000;198-199.
-
(2000)
Symp. VLSI Tech. Dig.
, Issue.JUNE
, pp. 198-199
-
-
Lee, W.-C.1
Hu, C.2
-
10
-
-
0034454057
-
Controlling floating-body effects for 0.13 μm and 0.10 μm SOI CMOS
-
Fung S.K.H.et al. Controlling floating-body effects for 0.13 μm and 0.10 μm SOI CMOS. IEDM Tech. Dig. (December):2000;231-234.
-
(2000)
IEDM Tech. Dig.
, Issue.DECEMBER
, pp. 231-234
-
-
Fung, S.K.H.1
-
11
-
-
0034795708
-
Effects of gate-to-body tunneling current on PD/SOI CMOS SRAM
-
Joshi R.V.et al. Effects of gate-to-body tunneling current on PD/SOI CMOS SRAM. Symp. VLSI Tech. Dig. (June):2001;75-76.
-
(2001)
Symp. VLSI Tech. Dig.
, Issue.JUNE
, pp. 75-76
-
-
Joshi, R.V.1
-
12
-
-
0036458721
-
Effects of gate-to-body tunneling current on pass-transistor based PD/ SOI CMOS circuits
-
October
-
Chuang CT, Puri R. Effects of gate-to-body tunneling current on pass-transistor based PD/SOI CMOS circuits. In: Proc IEEE Internat SOI Conf, October 2002. p. 121-2.
-
(2002)
Proc IEEE Internat SOI Conf
, pp. 121-122
-
-
Chuang, C.T.1
Puri, R.2
-
13
-
-
0036458719
-
Emerging floating-body effects in advanced partially-depleted SOI devices
-
October
-
Poiroux T et al. Emerging floating-body effects in advanced partially-depleted SOI devices. In: Proc IEEE Internat SOI Conf, October 2002. p. 99-100.
-
(2002)
Proc IEEE Internat SOI Conf
, pp. 99-100
-
-
Poiroux, T.1
-
14
-
-
0001929570
-
Tunneling from an independent-particle point of view
-
Harrison W.A. Tunneling from an independent-particle point of view. Phys. Rev. 123(July):1961;85-89.
-
(1961)
Phys. Rev.
, vol.123
, Issue.JULY
, pp. 85-89
-
-
Harrison, W.A.1
-
15
-
-
0036247928
-
On the performance advantage of PD/SOI CMOS with floating bodies
-
Pelella M.M., Fossum J.G. On the performance advantage of PD/SOI CMOS with floating bodies. IEEE Trans. Electron Devices. 49(January):2002;96-104.
-
(2002)
IEEE Trans. Electron Devices
, vol.49
, Issue.JANUARY
, pp. 96-104
-
-
Pelella, M.M.1
Fossum, J.G.2
-
17
-
-
0015483650
-
Theoretical tunneling current characteristics of the SIS diode
-
Shewchun J., Temple V.A.K. Theoretical tunneling current characteristics of the SIS diode. J. Appl. Phys. 43(December):1972;5051-5061.
-
(1972)
J. Appl. Phys.
, vol.43
, Issue.DECEMBER
, pp. 5051-5061
-
-
Shewchun, J.1
Temple, V.A.K.2
-
18
-
-
0029359886
-
2/Si structure
-
2/Si structure. Solid-State Electron. 38(August):1995;1465-1471.
-
(1995)
Solid-state Electron.
, vol.38
, Issue.AUGUST
, pp. 1465-1471
-
-
Depas, M.1
-
22
-
-
0032202447
-
Polarity dependent gate tunneling currents in dual-gate CMOSFET's
-
Shi Y.et al. Polarity dependent gate tunneling currents in dual-gate CMOSFET's. IEEE Trans. Electron Devices. 45(November):1998;2355-2360.
-
(1998)
IEEE Trans. Electron Devices
, vol.45
, Issue.NOVEMBER
, pp. 2355-2360
-
-
Shi, Y.1
-
23
-
-
0001162048
-
Empirical approximations for the Fermi energy in a semiconductor with parabolic bands
-
Nilsson N.G. Empirical approximations for the Fermi energy in a semiconductor with parabolic bands. Appl. Phys. Lett. 33(October):1978;653-654.
-
(1978)
Appl. Phys. Lett.
, vol.33
, Issue.OCTOBER
, pp. 653-654
-
-
Nilsson, N.G.1
-
24
-
-
0242264168
-
-
Ph.D. Dissertation. University of Florida
-
Chiang M-H. Ph.D. Dissertation. University of Florida, 2001.
-
(2001)
-
-
Chiang, M.-H.1
-
25
-
-
0028396643
-
A simple model for quantization effects in heavily-doped silicon MOSFETs at inversion conditions
-
Van Dort M.J., Woerlee P.H., Walker A.J. A simple model for quantization effects in heavily-doped silicon MOSFETs at inversion conditions. Solid-State Electron. 37(March):1994;411-414.
-
(1994)
Solid-state Electron.
, vol.37
, Issue.MARCH
, pp. 411-414
-
-
Van Dort, M.J.1
Woerlee, P.H.2
Walker, A.J.3
-
26
-
-
0001062766
-
Electron exchange energy in Si inversion layers
-
Stern F. Electron exchange energy in Si inversion layers. Phys. Rev. Lett. 30(7):1973;278-280.
-
(1973)
Phys. Rev. Lett.
, vol.30
, Issue.7
, pp. 278-280
-
-
Stern, F.1
-
27
-
-
0029546067
-
Low-voltage transient bipolar effect induced by dynamic floating-body charging in PD/SOI MOSFETs
-
October
-
Pelella MM et al. Low-voltage transient bipolar effect induced by dynamic floating-body charging in PD/SOI MOSFETs. In: Proc IEEE Internat SOI Conf, October 1995. p. 8-9.
-
(1995)
Proc IEEE Internat SOI Conf
, pp. 8-9
-
-
Pelella, M.M.1
-
28
-
-
0030421966
-
Parasitic bipolar turn-on of PD-SOI MOSFETs in dynamic logic circuits
-
October
-
Chin SC, Tseng Y-C, Woo JCS. Parasitic bipolar turn-on of PD-SOI MOSFETs in dynamic logic circuits. In: Proc IEEE Internat SOI Conf, October 1996. p. 144-5.
-
(1996)
Proc IEEE Internat SOI Conf
, pp. 144-145
-
-
Chin, S.C.1
Tseng, Y.-C.2
Woo, J.C.S.3
-
29
-
-
0031210445
-
Floating-body effects in partially depleted SOI CMOS circuits
-
Lu P.-F.et al. Floating-body effects in partially depleted SOI CMOS circuits. IEEE J. Solid-State Circuits. 32(August):1997;1241-1253.
-
(1997)
IEEE J. Solid-State Circuits
, vol.32
, Issue.AUGUST
, pp. 1241-1253
-
-
Lu, P.-F.1
-
30
-
-
0032314533
-
Design considerations of SOI digital CMOS VLSI
-
October
-
Chuang CT. Design considerations of SOI digital CMOS VLSI. In: Proc IEEE Internat SOI Conf, October 1998; p. 5-8.
-
(1998)
Proc IEEE Internat SOI Conf
, pp. 5-8
-
-
Chuang, C.T.1
-
31
-
-
0036458456
-
Impact of gate tunneling on the nature of the charge dump current in 100 nm PDSOI CMOS
-
October
-
Sinha S, Chiang M-H, Pelella MM. Impact of gate tunneling on the nature of the charge dump current in 100 nm PDSOI CMOS. In: Proc IEEE Internat SOI Conf, October 2002; p. 41-2.
-
(2002)
Proc IEEE Internat SOI Conf
, pp. 41-42
-
-
Sinha, S.1
Chiang, M.-H.2
Pelella, M.M.3
-
32
-
-
0032073371
-
Design issues and insights for low-voltage high-density SOI DRAM
-
Fossum J.G., Chiang M.-H., Houston T.W. Design issues and insights for low-voltage high-density SOI DRAM. IEEE Trans. Electron Devices. 45(May):1998;1055-1062.
-
(1998)
IEEE Trans. Electron Devices
, vol.45
, Issue.MAY
, pp. 1055-1062
-
-
Fossum, J.G.1
Chiang, M.-H.2
Houston, T.W.3
|