Substrate-triggered ESD clamp devices for use in power-rail ESD clamp circuits

Solid-State Electronics

Volumn 46, Issue 5, 2002, Pages 721-734

  Ker, Ming Dou ^a   Chen, Tung Yang ^a   Wu, Chung Yu ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Bipolar junction transistor; Electrostatic discharge; Electrostatic discharge clamp circuit; Secondary breakdown current (It2); Substrate triggered technique

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC DISCHARGES; GATES (TRANSISTOR); SEMICONDUCTING SILICON; SUBSTRATES; TRIGGER CIRCUITS;

ELECTROSTATIC DISCHARGE (ESD) CLAMP CIRCUITS;

BIPOLAR TRANSISTORS;

EID: 0036568226     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(01)00317-3     Document Type: Article

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