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Volumn , Issue , 1998, Pages 54-62
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ESD protection for mixed-voltage I/O using NMOS transistors stacked in a cascode configuration
a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRIC DISCHARGES;
ELECTROSTATICS;
MOSFET DEVICES;
TRIGGER CIRCUITS;
ELECTROSTATIC DISCHARGE (ESD) PROTECTION;
ELECTRIC SHIELDING;
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EID: 0032316866
PISSN: 07395159
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (72)
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References (9)
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