Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 4, Issue 3, 1996, Pages 307-321

  Ker, Ming Dou ^a,b   Wu, Chung Yu ^a,b   Cheng, Tao ^b   Chang, Hun Hsien ^a,b  

^a IEEE

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; CAPACITORS; CMOS INTEGRATED CIRCUITS; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC CURRENT DISTRIBUTION; ELECTRIC DISCHARGES; ELECTRIC WIRE; OXIDES;

CAPACITOR COUPLE TECHNIQUE; ELECTROSTATIC DISCHARGE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0030242764     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.532032     Document Type: Article

References (21)

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