Mechanical stress analysis of an LDD MOSFET structure

IEEE Transactions on Electron Devices

Volumn 43, Issue 9, 1996, Pages 1525-1532

  Ferreira, Paul ^a   Senez, Vincent ^a   Baccus, Bruno ^a  

^a Institut Superieur de l'Electronique et du Numerique   (France)

Author keywords

[No Author keywords available]

Indexed keywords

FINITE ELEMENT METHOD; RESIDUAL STRESSES; RHEOLOGY; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES; STRESS ANALYSIS; SUBSTRATES; THERMAL CYCLING; THERMOOXIDATION; VISCOELASTICITY;

LIGHTLY DOPED DEVICE (LDD);

MOSFET DEVICES;

EID: 0030241405     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.535345     Document Type: Article

References (29)

1. V. Senez, D. Collard, B. Baccus, M. Brault, and J. Lebailly, "Analysis and application of a viscoelastic model for silicon oxidation." J. Appl. Phys., vol 76, No 6, p 3285, 1994.
2. S. Isomae and S. Yamamoto, "A new two-dimensional silicon oxidation model," IEEE Trans. Computer-Aided Design, vol. 6, No 3, p. 410, May 1987.
3. J. P. Peng, D. Chidambarrao, and G. R. Srinivasan, "NOVEL: A nonlinear viscoelastic model for thermal oxidation of silicon," COMPEL, vol. 10, pp. 341-353, Dec. 1991.
4. D. Chidambarrao, J. P. Peng, and G. R. Srinivasan, "Stresses in silicon substrates near isolation trenches,"/ Appl. Phys., vol. 70, p. 4816, 1991.
5. H. Miura, N. Saito, H. Ohta, and N. Okamato, "Mechanical stress design system for semiconductor devices," Proc. VPAD'93, 1993, p. 60.
6. A. Cifuentes and I. A. Shareef, "Modeling of multilevel structures: A general method for analyzing stress evolution during processing," IEEE Truns. Seraicond. Manufact., vol. 5, no. 2, p. 128, May 1992.
7. S. Matsuda, N. Itoh, C. Yoshino, Y. Tsuboi, Y. Katsumata, and H. Iwai, "Analysis of mechanical stress associated with trench isolation using a two-dimensional simulation." Proc. VPAD'93, 1993, p. 64.
8. B. Baccus, D. Collard, and E. Dubois, "Efficient 2D-multilayer process simulation of advanced bipolar devices," Solid-State Electron., vol. 32, pp. 1013, Nov. 1989.
9. V. Senez, D. Collard, P. Ferreira, and B. Raccus "Simulation of advanced field isolation using calibrated viscoelastic stress analysis," Proc. IEDM 94. p. 881, 1994.
10. [101 P- Sutardja and W. G. Oldham, "Modeling of stress effects in silicon oxidation," IEEE Trans. Electron Devices, vol. 36, no. 11, p. 2415. Nov. 1989.
11. O. Zienkiewicz, The Finite Element Method in Engineering Science. New York: McGraw-Hill, 1971.
12. H. Umimoto, S. Odanaka, I. Nakao, and H. Esaki, "Numerical modeling of nonplanar oxidation coupled with stress effects," IEEE Trans. Cornpuler-Aided Design, vol. 8, no. 6, p. 599, June 1989.
13. E. P. Eernisse, "Viscous flow of thermal SiC>2," Appl. Phys. Lett, vol. 30, pp. 290, 1977.
14. S. M. Sze, VLSI Technology. 2d ed. New York: McGraw-Hill, 1988.
15. M. Stadtmüller, "Mechanical stress of CVD-dielectrics," 7. Electrochem. Soc., vol. 12, Dec. 92.
16. P. Ferreira, V. Senez, D. Collard, and B. Baccus, "Study of local silicon oxidation with calibrated nitride model." Proc. ESSDERC'94., Edinburgh. Scotland, Sept. 1994, pp. 259-262.
17. V. Senez, D. Collard, P. Ferreira, and B. Baccus, "Two dimensional simulation of local oxidation of silicon: Calibrated viscoelastic flow analysis." IEEE Trans. Electron Devices, vol. 43, no. 5, pp. 720-731, May 1996.
18. [18J E. Kobeda and E. A. Irene, "In Situ stress measurements during thermal oxidation of silicon," J. Vac. Sci. Technol, vol. B.7, p. 163, 1989.
19. O. V. Mazurin, M. J. Streitsina, and T.P. Shvaiko-Shaikovskaya, Handbook of Class Data. Amsterdam: Elscvicr, 1983, pp. 31-44.
20. L. Maissel, "Thermal expansion of silicon," J. Appl. Phys., vol. 32, p. 211, 1960.
21. B. Bhushan and S.P. Murarka. "Stress in silicon dioxide films deposited using chemical vapor deposition techniques and effect of annealing on these stresses," J. Vac. Sci. Technol, vol. B8, p. 1068, 1990.
22. M. S. Choi and E. W. Hearn, "Stress effects in boron-implanted polysilicon films." J. Electrochern. Soc., vol. 131, no. 10, p. 2443, 1984.
23. T. Suzuki, A. Mimura, and T. Ogawa, "The deformation of polycrystalline silicon deposited on oxide-covered single crystal silicon substrates," / Electrochern. Soc., vol. 124, no. 11, pp. 1776-1780, 1977.
24. H. Miura, H. Ohta, H. Sakata, and N. Okamoto, "Residual stress measurement in silicon substrates after thermal oxidation," JSMF. A, vol. 36, no. 3, 1993.
25. B. Coulman, C. Aussems, P.A. Van Den Plas, and N. Wils, "LOCOS isolation for ULSI," Proc. 2nd Int Symp on ULSI Science and Technology, 1989, p. 759.
26. [2fi] H. Miura, N. Saito, and N. Okamoto, "Mechanical stress simulation during gate formation of MOS devices considering crystallizationinduced stress of p-doped silicon thin films," in Proc. SISDEP'93, 1993, p. 177.
27. S. Onishi, A. Ayakuwa, K. Tanaka, and K. Sakiyama, "A mechanism of the sidewall process induced junction leakage current of I ,DD structure," J. Electrochem. Soc., vol. 138, no. 5, p. 1439, 1991.
28. [281 B.H. Rabin, R.L. Williamson, S. Suresh, "Fundamentals of residual stresses in joints between dissimilar materials," MRS Bulletin., p. 37, Jan. 1995.
29. P. Ferreira, V. Senez, B. Baccus, J. Varon, and J. Lebailly, "Finite element optimization of a mosfet structure: The role of intcrlaycr materials for residual stress reduction," Proc. IEDM'9.5 Conf., Washington, D.C., Dec. 1995, pp. 503-506.