Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach

OpenAccess Series in Informatics

Volumn 18, Issue , 2011, Pages 11-21

  Schoeberl, Martin ^a   Schleuniger, Pascal ^a   Puffitsch, Wolfgang ^b   Brandner, Florian ^c   Probst, Christian W ^a   Karlsson, Sven ^a   Thorn, Tommy ^d  

^a TECHNICAL UNIVERSITY OF DENMARK   (Denmark)

^b VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

^c UNIVERSITÉ DE LYON   (France)

^d Maryland and New York Bars and Practices   (United States)

Author keywords

Time predictable architecture; WCET analysis; WCET aware compilation

Indexed keywords

PROGRAM COMPILERS; REDUCED INSTRUCTION SET COMPUTING;

ARCHITECTURAL FEATURES; AVERAGE CASE PERFORMANCE; BAD-CASE EXECUTION TIME-AWARE COMPILATION; CREATIVE COMMONS; CURRENT PROCESSORS; RISC PROCESSORS; TIME BOUND; TIME-PREDICTABLE ARCHITECTURE; WORST-CASE EXECUTION TIME; WORST-CASE EXECUTION-TIME ANALYSIS;

CACHE MEMORY;

EID: 85117752095     PISSN: 21906807     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.4230/OASIcs.PPES.2011.11     Document Type: Conference Paper

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