Parametric Yield Modeling and Simulations of FPGA Circuits Considering Within-Die Delay Variations

ACM Transactions on Reconfigurable Technology and Systems

Volumn 1, Issue 2, 2008, Pages 1-28

  Sedcole, Pete ^a   Cheung, Peter Y K ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

Delay; FPGA; modeling; process variation; reconfiguration; statistical theory; Theory; within die variability; yield

Indexed keywords

EID: 85016058885     PISSN: 19367406     EISSN: 19367414     Source Type: Journal    
DOI: 10.1145/1371579.1371582     Document Type: Article

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