Design sensitivities to variability: Extrapolations and assessments in nanometer VLSI

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn 2002-January, Issue , 2002, Pages 411-415

  Cao, Y ^a   Gupta, P ^b   Kahng, A B ^b   Sylvester, D ^c   Yang, J ^c  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c Department of Ecology and Evolutionary Biology   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CIRCUIT SIMULATION; MONTE CARLO METHODS; VLSI CIRCUITS;

ALTERNATIVE PROCESS; CIRCUIT PERFORMANCE; DESIGN SENSITIVITY; MONTE CARLO ANALYSIS; PROCESS PARAMETERS; PROCESS VARIATION; RETURNS ON INVESTMENT; TECHNOLOGY NODES;

INTEGRATED CIRCUIT DESIGN;

EID: 84949480508     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASIC.2002.1158094     Document Type: Conference Paper

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