Process optimizations for NBTI/PBTI for future replacement metal gate technologies

IEEE International Reliability Physics Symposium Proceedings

Volumn 2016-September, Issue , 2016, Pages 4B11-4B15

  Linder, Barry P ^a   Dasgupta, A ^b   Ando, T ^a   Cartier, E ^a   Kwon, U ^b   Southwick, R ^a   Wang, M ^a   Krishnan, S A ^d   Hopstaken, M ^a   Bajaj, M ^c   Pandey, R ^c   Chang, W ^a   Yamashita, T ^a   Gluschenkov, O ^a   Narayanan, V ^a   Stathis, J ^a   Ray, S ^b   Liu, J ^b  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM MICROELECTRONICS   (United States)

^c Globalfoun Dries   (India)

^d APPLIED MATERIALS INC   (United States)

Author keywords

HfO2; High K gate dielectrics; NBTI; PBTI; Semiconductor device reliability

Indexed keywords

DIELECTRIC MATERIALS; HAFNIUM OXIDES; HIGH-K DIELECTRIC; RECONFIGURABLE HARDWARE; RELIABILITY; SEMICONDUCTOR DEVICES;

HFO2; HIGH- K GATE DIELECTRICS; NBTI; PBTI; SEMICONDUCTOR DEVICE RELIABILITY;

GATE DIELECTRICS;

EID: 84990929695     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2016.7574532     Document Type: Conference Paper

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