Understanding mobility mechanisms in extremely scaled HfO2 (EOT 0.42 nm) using remote interfacial layer scavenging technique and V t-tuning dipoles with gate-first process

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Ando, T ^a   Frank, M M ^a   Choi, K ^a   Choi, C ^a   Bruley, J ^a   Hopstaken, M ^a   Copel, M ^a   Cartier, E ^a   Kerber, A ^b   Callegari, A ^a   Lacey, D ^a   Brown, S ^a   Yang, Q ^a   Narayanan, V ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EQUIVALENT OXIDE THICKNESS; INTERFACIAL LAYER; INTRINSIC EFFECTS; MOBILITY DEGRADATION; MOS-FET; SCALING EFFECTS; TECHNOLOGY NODES;

DEGRADATION; ELECTRON DEVICES; GATE DIELECTRICS; GATES (TRANSISTOR); HAFNIUM COMPOUNDS;

CARRIER MOBILITY;

EID: 77952384171     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424335     Document Type: Conference Paper

References (12)

1. K. Henson et al., IEDM Tech. Dig., 2008, pg. 645.
2. C. Choi et al., Tech. Dig. VLSI Symp., 2005, pg. 208.
3. M. Suzuki, M. Tomita, T. Yamaguchi, and N. Fukushima, IEDM Tech. Dig., 2005, pg. 433.
4. M. Takahashi et al., IEDM Tech. Dig., 2007, pg. 523.
5. J. Huang et al., Tech. Dig. VLSI Symp., 2009, pg. 34.
6. K. Choi et al., Tech. Dig. VLSI Symp., 2009, pg. 138.
7. K. Tatsumura et al., IEDM Tech. Dig., 2008, pg. 25.
8. J. Huang et al., IEDM Tech. Dig., 2008, pg. 45.
9. J.R. Hauser, IEEE Trans. Electron Devices 43, 1981 (1996)
10. J. Li and T. P. Ma, J. Appl. Phys. 62 (1987) 10.
11. K. Maitra, M. M. Frank, V. Narayanan, V. Misra, and E. A. Cartier, J. Appl. Phys. 102 (2007) 114507.
12. M.V. Fischetti, D. A. Neumayer, and E. A. Cartier, J. Appl. Phys. 90 (2001)