Simultaneous switching noise and resonance analysis of on-chip power distribution network

Proceedings - International Symposium on Quality Electronic Design, ISQED

Volumn 2002-January, Issue , 2002, Pages 163-168

  Bai, Geng ^a   Hajj, Ibrahim N ^b  

^a Nassda Corporation   (United States)

^b AMERICAN UNIVERSITY OF BEIRUT   (Lebanon)

Author keywords

Circuit noise; Frequency domain analysis; Network on a chip; Power systems; Resonance; RLC circuits; Sensitivity analysis; Time domain analysis; Very large scale integration; Voltage

Indexed keywords

CIRCUIT SIMULATION; ELECTRIC NETWORK ANALYSIS; ELECTRIC POTENTIAL; FREQUENCY DOMAIN ANALYSIS; INTEGRATED CIRCUIT INTERCONNECTS; INTEGRATED CIRCUIT TESTING; NETWORKS (CIRCUITS); RESONANCE; SENSITIVITY ANALYSIS; SPICE; STANDBY POWER SYSTEMS; VLSI CIRCUITS;

CIRCUIT NOISE; FREQUENCY DOMAIN TECHNIQUES; NETWORK ON A CHIP; ON-CHIP POWER DISTRIBUTION; OPTIMIZATION PROCEDURES; POWER DISTRIBUTION NETWORK; RLC CIRCUIT; SIMULTANEOUS SWITCHING NOISE;

TIME DOMAIN ANALYSIS;

EID: 84948449947     PISSN: 19483287     EISSN: 19483295     Source Type: Journal    
DOI: 10.1109/ISQED.2002.996723     Document Type: Article

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