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Volumn , Issue , 2000, Pages 179-184

Model and analysis for combined package and on-chip power grid simulation

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; ELECTRIC POWER DISTRIBUTION; ELECTRIC POWER SYSTEMS; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; TRANSIENTS;

EID: 0033670992     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/344166.344574     Document Type: Conference Paper
Times cited : (61)

References (12)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.