Maximum power supply noise estimation in VLSI circuits using multimodal genetic algorithms

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 3, Issue , 2001, Pages 1437-1440

  Bai, Geng ^a   Bobba, Sudhakar ^b   Hajj, Ibrahim N ^a,c  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b SUN MICROSYSTEMS   (United States)

^c AMERICAN UNIVERSITY OF BEIRUT   (Lebanon)

Author keywords

[No Author keywords available]

Indexed keywords

FITNESS VALUES; GLOBALOPTIMUM; LINEAR SOLVER; MAXIMUM POWER; MULTI-MODAL; POWER BUS; VOLTAGE DROP;

DIGITAL CIRCUITS; DROPS; GENETIC ALGORITHMS; INTEGRATED CIRCUIT TESTING; VOLTAGE CONTROL;

VLSI CIRCUITS;

EID: 16244365972     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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