Analysis of performance impact caused by power supply noise in deep submicron devices

Proceedings - Design Automation Conference

Volumn , Issue , 1999, Pages 760-765

  Jiang, Yi Min ^a   Cheng, Kwang Ting ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CRITICAL PATH ANALYSIS; ELECTRIC NETWORK ANALYSIS; MATHEMATICAL MODELS; POWER SUPPLY CIRCUITS; SPURIOUS SIGNAL NOISE; STATISTICAL METHODS;

DEEP SUB-MICRON DEVICES; STATISTICAL TIMING ANALYSIS;

CMOS INTEGRATED CIRCUITS;

EID: 0032657615     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/309847.310053     Document Type: Conference Paper

References (9)