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Volumn 2000-January, Issue , 2000, Pages 481-486

Simulation and optimization of the power distribution network VLSI circuits

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER AIDED DESIGN; ELECTRIC NETWORK ANALYSIS; FREQUENCY DOMAIN ANALYSIS; INTEGRATED CIRCUIT INTERCONNECTS; NETWORKS (CIRCUITS); SENSITIVITY ANALYSIS; VLSI CIRCUITS; COMPUTER SIMULATION; OPTIMIZATION;

EID: 0034478054     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2000.896519     Document Type: Conference Paper
Times cited : (64)

References (13)
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  • 2
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  • 4
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  • 6
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    • Aug
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    • Jiang, Y.-M.1    Cheng, K.-T.2    Deng, A.-C.3
  • 7
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    • Power bus maximum voltage drop in digital VLSI circuits
    • Mar
    • G. Bai, S. Bobba and I. N. Hajj, "Power bus maximum voltage drop in digital VLSI circuits", in Proc. of ISQED, pp. 263- 268, Mar. 2000.
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  • 8
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  • 9
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  • 10
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  • 11
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.