Resonance and damping in CMOS circuits with on-chip decoupling capacitance

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 45, Issue 8, 1998, Pages 849-858

  Larsson, Patrik ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

Noise; Resonance; Rlc circuits

Indexed keywords

CAPACITANCE; DAMPING; DIGITAL CIRCUITS; ELECTRIC FIELD EFFECTS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; MATHEMATICAL TECHNIQUES; NATURAL FREQUENCIES; RESONANCE; SIGNAL TO NOISE RATIO;

DECOUPLING CAPACITORS; ON CHIP DECOUPLING CAPACITANCE; PARASITIC RESISTORS;

CMOS INTEGRATED CIRCUITS;

EID: 0032139844     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.704824     Document Type: Article

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