Estimation of maximum power supply noise for deep sub-micron designs

Proceedings of the International Symposium on Low Power Design

Volumn , Issue , 1998, Pages 233-238

  Jiang, Yi Min ^a   Cheng, Kwang Ting ^a   Deng, An Chang ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC WAVEFORMS; GENETIC ALGORITHMS; SPURIOUS SIGNAL NOISE; TRANSISTORS; VECTORS;

CELL LEVEL WAVEFORM SIMULATOR; MAXIMUM POWER SUPPLY NOISE; TRANSISTOR LEVEL SIMULATOR;

ELECTRIC POWER SUPPLIES TO APPARATUS;

EID: 0031642633     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)