Full-Chip verification methods for dsm power distribution systems

Proceedings - Design Automation Conference

Volumn , Issue , 1998, Pages 744-749

  Steele, Gregory ^a   Overhauser, David ^a   Rochel, Steffen ^a   Hussain, Syed Zakir ^a  

^a Simplex Solutions Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT LAYOUT; TRANSISTORS;

DEEP SUB-MICRON DESIGNS; DYNAMIC EFFECTS; DYNAMIC TECHNIQUES; FULL CHIP VERIFICATION; HIGH-PERFORMANCE INTEGRATED CIRCUITS; POWER DISTRIBUTION SYSTEM; POWER DISTRIBUTIONS; TRANSISTOR LEVEL;

AUTOMATION; MICROPROCESSOR CHIPS;

DEEP SUBMICRON DESIGN;

EID: 0031619177     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/277044.277231     Document Type: Conference Paper

References (11)

1. Lightning VI.2 Power-Distribution Verification Manual. Simplex Solutions, Inc., 1997.
2. Chi-ying Tsui, Radu Marculescu, Diana Marculescu, and Massoud Pedram. Improving the efficiency of power simulators by input vector compaction. In Design Automation Conf., pages 165-168, June 1997.
3. Joseph N. Kozhaya and Farid N. Najm. Accurate Power Estimation for Large Sequential Circuits. In Int'l Conf on Computer Aided Design, pages 488-493, November 1997.
4. Yong Je Lim, Kyung-Im Son, Heung-Joon Park, and Mani Soma. A Statistical Approach to the Estimation of Delay-Dependent Switching Activities in CMOS Combinational Circuits. In Design Automation Conf., pages 445-450, June 1996.
5. Li-Pen Yuan, Chin-Chi Teng, and Sung-Mo Kang. Statistical Estimation of Average Power Dissipation in Sequential Circuits. In Design Automation Conf., pages 377-382, June 1997.
6. H.J.M. Veendrick. Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits. IEEE J. Solid-State Circuits, SC-19:486-473, August 1984.
7. Radu Marculescu, Diana Marculescu, and Massoud Pedram. Hierarchical Sequence Compaction for Power Estimation. In Design Automation Conf., pages 570-575, June 1997.
8. Angela Krstic and Kwang-Ting Cheng. Vector Generation for Maximum Instantaneous Current Through Supply Lines for CMOS Circuits. In Design Automation Conf., pages 383-388, June 1997.
9. Subodh Gupta and Farid N. Najm. Power Macromod-eling for High Level Power Estimation". In Design Automation Conf., pages 365-370, June 1997.
10. Alessandro Bogliolo, Luca Benini, Giovanni De Micheli, and Bruno Ricco. Gate-Level Power and Current Simulation of CMOS Integrated Circuits. IEEE Trans. VLSI Syst., 5(4):473-487, December 1997.
11. Thunder VI.2 Transistor-Level Verification Manual. Simplex Solutions, Inc., 1997.