메뉴 건너뛰기




Volumn 103, Issue 8, 2015, Pages 1331-1345

Evolution of Memory Architecture

Author keywords

Approximate memories; disk; dynamic random access memory (DRAM); flash memory; main memory; memory hierarchy; near data processing; non von Neumann architectures; processing in memory; storage class memory; von Neumann architecture

Indexed keywords

CACHE MEMORY; DATA HANDLING; DISTRIBUTED COMPUTER SYSTEMS; DISTRIBUTED DATABASE SYSTEMS; FLASH MEMORY; MEMORY ARCHITECTURE;

EID: 84937250157     PISSN: 00189219     EISSN: 15582256     Source Type: Journal    
DOI: 10.1109/JPROC.2015.2435018     Document Type: Article
Times cited : (58)

References (76)
  • 1
    • 84864559630 scopus 로고
    • First draft of a report on the EDVAC
    • J. Von Neumann, "First draft of a report on the EDVAC," IEEE Ann. History Comput., vol. 15, no. 4, pp. 27-75, 1993.
    • (1993) IEEE Ann. History Comput. , vol.15 , Issue.4 , pp. 27-75
    • Von Neumann, J.1
  • 2
    • 0016773378 scopus 로고
    • A preliminary architecture for a basic data-flow processor
    • Jan.
    • J. B. Dennis and D. P. Misunas, "A preliminary architecture for a basic data-flow processor," ACM SIGARCH Comput. Architect. News, vol. 3, no. 4, pp. 126-132, Jan. 1975.
    • (1975) ACM SIGARCH Comput. Architect. News , vol.3 , Issue.4 , pp. 126-132
    • Dennis, J.B.1    Misunas, D.P.2
  • 3
    • 0031166167 scopus 로고    scopus 로고
    • Moore's law: Past, present and future
    • Jun.
    • R. R. Schaller, "Moore's law: Past, present and future," IEEE Spectrum, vol. 34, no. 6, pp. 52-59, Jun. 1997.
    • (1997) IEEE Spectrum , vol.34 , Issue.6 , pp. 52-59
    • Schaller, R.R.1
  • 5
    • 84902503424 scopus 로고    scopus 로고
    • chapter III - EDVAC. [Online]. Available
    • Electronic computers within the Ordnance Corps, chapter III - EDVAC. [Online]. Available: http://ftp.arl.mil/~mike/comphist/61ordnance/chap3.html.
    • Electronic Computers within the Ordnance Corps
  • 6
    • 84937244944 scopus 로고    scopus 로고
    • press release. [Online]. Available
    • IBM Archives, Magnetic drum data processing machine announcement, press release. [Online]. Available: http://www-03.ibm.com/ibm/history/exhibits/650/650-pr1.html.
    • Magnetic Drum Data Processing Machine Announcement
  • 7
    • 84937198374 scopus 로고    scopus 로고
    • Available
    • Wikipedia, Magnetic-core memory. [Online]. Available: http://en.wikipedia.org/wiki/Magnetic-core-memory.
    • Magnetic-Core Memory. [Online]
  • 9
    • 0003608201 scopus 로고
    • Field-effect transistor memory
    • U.S. Patent
    • R. H. Dennard, "Field-effect transistor memory," U.S. Patent 3 387 286, 1968.
    • (1968)
    • Dennard, R.H.1
  • 10
    • 84937244946 scopus 로고
    • [Online]. Available
    • Mostek, Circuits and systems product guide, 1980. [Online]. Available: http://bitsavers.trailing-edge.com/pdf/mostek/-dataBooks/1980-Mostek-Circuits-and-Systems-Product-Guide.pdf.
    • (1980) Mostek, Circuits and Systems Product Guide
  • 12
    • 84976746765 scopus 로고
    • Virtual memory
    • P. J. Denning, "Virtual memory," ACM Comput. Surv., vol. 2, no. 3, pp. 153-189, 1970.
    • (1970) ACM Comput. Surv. , vol.2 , Issue.3 , pp. 153-189
    • Denning, P.J.1
  • 14
    • 84937210433 scopus 로고    scopus 로고
    • Available
    • IBM Corporation, IBM power system E880 data sheet. [Online]. Available: http://www.ibm.com/common/ssi/cgi-bin/ssialias?subtype=SP&infotype=PM&appname=STGE-PO-PO-USEN&htmlfid=PO-D03105USEN.
    • IBM Power System E880 Data Sheet. [Online]
  • 15
    • 34548851167 scopus 로고    scopus 로고
    • A 500 MHz random cycle, 1.5 ns-latency, SOI embedded DRAM macro featuring a three transistor micro sense amplifier
    • J. Barth et al., "A 500 MHz random cycle, 1.5 ns-latency, SOI embedded DRAM macro featuring a three transistor micro sense amplifier," in Proc. IEEE Int. Solid-State Circuits Conf., 2007, pp. 486-617.
    • Proc. IEEE Int. Solid-State Circuits Conf., 2007 , pp. 486-617
    • Barth, J.1
  • 16
    • 84871447955 scopus 로고    scopus 로고
    • A survey of architectural techniques for DRAM power management
    • S. Mittal, "A survey of architectural techniques for DRAM power management," Int. J. High Performance Syst. Architect., vol. 4, no. 2, pp. 110-119, 2012.
    • (2012) Int. J. High Performance Syst. Architect. , vol.4 , Issue.2 , pp. 110-119
    • Mittal, S.1
  • 17
    • 0028419307 scopus 로고
    • The effect of cosmic rays on the soft error rate of a DRAM at ground level
    • Apr.
    • T. J. O'Gorman, "The effect of cosmic rays on the soft error rate of a DRAM at ground level," IEEE Trans. Electron Devices, vol. 41, no. 4, pp. 553-557, Apr. 1994.
    • (1994) IEEE Trans. Electron Devices , vol.41 , Issue.4 , pp. 553-557
    • O'Gorman, T.J.1
  • 18
    • 0018021595 scopus 로고
    • Multiple word/bit line redundancy for semiconductor memories
    • Oct.
    • S. E. Schuster, "Multiple word/bit line redundancy for semiconductor memories," IEEE J. Solid-State Circuits, vol. 13, no. 5, pp. 698-703, Oct. 1978.
    • (1978) IEEE J. Solid-State Circuits , vol.13 , Issue.5 , pp. 698-703
    • Schuster, S.E.1
  • 21
    • 84937198737 scopus 로고    scopus 로고
    • Tech. Note [Online]. Available
    • Micron, "Wear leveling in micron NAND memory," Tech. Note TN-29-61. [Online]. Available: http://www.micron.com/~/media/Documents/Products/Technical%20Note/NAND%20Flash/tn2961-wear-leveling-in-nand.pdf.
    • Wear Leveling in Micron NAND Memory
  • 27
    • 33847743417 scopus 로고    scopus 로고
    • A novel nonvolatile memory with spin torque transfer magnetization switching: Spin-RAM
    • M. Hosomi et al., "A novel nonvolatile memory with spin torque transfer magnetization switching: Spin-RAM," in IEEE Int. Electron Devices Meeting Tech. Dig., Dec. 2005, pp. 459-462.
    • IEEE Int. Electron Devices Meeting Tech. Dig., Dec. 2005 , pp. 459-462
    • Hosomi, M.1
  • 28
    • 0020920186 scopus 로고
    • Principles of transaction-oriented database recovery
    • T. Haerder and A. Reuter, "Principles of transaction-oriented database recovery," ACM Comput. Surv., vol. 15, no. 4, pp. 287-317, 1983.
    • (1983) ACM Comput. Surv. , vol.15 , Issue.4 , pp. 287-317
    • Haerder, T.1    Reuter, A.2
  • 31
    • 84877723068 scopus 로고    scopus 로고
    • The blue gene/Q compute chip
    • [Online]. Available
    • The IBM Blue Gene Team, "The blue gene/Q compute chip," Hot Chips 23, 2011. [Online]. Available: http://www.hotchips.org/wp-content/uploads/hc-archives/hc23/HC23.18.1-manycore/HC23.18.121.BlueGene-IBM-BQC-HC23-20110818.pdf.
    • (2011) Hot Chips , vol.23
  • 34
    • 84870358706 scopus 로고    scopus 로고
    • CAP twelve years later: How the 'rules' have changed
    • E. A. Brewer, "CAP twelve years later: How the 'rules' have changed," Computer, vol. 45, no. 2, pp. 22-29, 2012.
    • (2012) Computer , vol.45 , Issue.2 , pp. 22-29
    • Brewer, E.A.1
  • 35
    • 67649463338 scopus 로고    scopus 로고
    • BASE: An ACID alternative
    • May/Jun.
    • D. Pritchett, "BASE: An ACID alternative," ACM Queue, vol. 6, no. 3, pp. 48-55, May/Jun. 2008.
    • (2008) ACM Queue , vol.6 , Issue.3 , pp. 48-55
    • Pritchett, D.1
  • 36
    • 84876789789 scopus 로고    scopus 로고
    • The SAP HANA database - An architecture overview
    • F. Färber et al., "The SAP HANA database - An architecture overview," IEEE Data Eng. Bull., vol. 35, no. 1, pp. 28-33, 2012.
    • (2012) IEEE Data Eng. Bull. , vol.35 , Issue.1 , pp. 28-33
    • Färber, F.1
  • 37
    • 77954780208 scopus 로고    scopus 로고
    • The case for RAMClouds: Scalable high-performance storage entirely in DRAM
    • Jan.
    • J. Ousterhout et al., "The case for RAMClouds: Scalable high-performance storage entirely in DRAM," SIGOPS Oper. Syst. Rev., vol. 43, no. 4, pp. 92-105, Jan. 2010.
    • (2010) SIGOPS Oper. Syst. Rev. , vol.43 , Issue.4 , pp. 92-105
    • Ousterhout, J.1
  • 41
    • 55549119760 scopus 로고    scopus 로고
    • Distributed caching with memcached
    • B. Fitzpatrick, "Distributed caching with memcached," Linux J., vol. 2004, no. 124, pp. 72-76, 2004.
    • (2004) Linux J. , vol.2004 , Issue.124 , pp. 72-76
    • Fitzpatrick, B.1
  • 43
    • 84880531952 scopus 로고    scopus 로고
    • The Netezza data appliance architecture: A platform for high performance data warehousing and analytics
    • P. Francisco, "The Netezza data appliance architecture: A platform for high performance data warehousing and analytics," in IBM Redbooks, 2011.
    • (2011) IBM Redbooks
    • Francisco, P.1
  • 47
    • 84961627475 scopus 로고    scopus 로고
    • Near-data processing: Insights from a MICRO-46 workshop
    • R. Balasubramonian et al., "Near-data processing: Insights from a MICRO-46 workshop," IEEE Micro, vol. 34, no. 4, pp. 36-42, 2014.
    • (2014) IEEE Micro , vol.34 , Issue.4 , pp. 36-42
    • Balasubramonian, R.1
  • 48
    • 0003158656 scopus 로고
    • Hitting the memory wall: Implications of the obvious
    • W. A. Wulf and S. A. McKee, "Hitting the memory wall: Implications of the obvious," ACM SIGARCH Comput. Architect. News, vol. 23, no. 1, pp. 20-24, 1995.
    • (1995) ACM SIGARCH Comput. Architect. News , vol.23 , Issue.1 , pp. 20-24
    • Wulf, W.A.1    McKee, S.A.2
  • 49
    • 0029290396 scopus 로고
    • Processing in memory: The Terasys massively parallel PIM array
    • M. Gokhale, B. Holmes, and K. Iobst, "Processing in memory: The Terasys massively parallel PIM array," Computer, vol. 28, no. 4, pp. 23-31, 1995.
    • (1995) Computer , vol.28 , Issue.4 , pp. 23-31
    • Gokhale, M.1    Holmes, B.2    Iobst, K.3
  • 52
    • 0031238171 scopus 로고    scopus 로고
    • Scalable processors in the billion-transistor era: IRAM
    • C. E. Kozyrakis et al., "Scalable processors in the billion-transistor era: IRAM," Computer, vol. 30, no. 9, pp. 75-78, 1997.
    • (1997) Computer , vol.30 , Issue.9 , pp. 75-78
    • Kozyrakis, C.E.1
  • 54
    • 84904164075 scopus 로고    scopus 로고
    • The POWER8 processor: Designed for big data, analytics, cloud environments
    • J. Friedrich et al., "The POWER8 processor: Designed for big data, analytics, cloud environments," in Proc. IEEE Int. Conf. IC Design Technol., May 2014, DOI: 10.1109/ICICDT.2014.6838618.
    • Proc. IEEE Int. Conf. IC Design Technol., May 2014
    • Friedrich, J.1
  • 55
    • 61549122276 scopus 로고    scopus 로고
    • Through-silicon via (TSV)
    • Jan.
    • M. Motoyoshi, "Through-silicon via (TSV)," Proc. IEEE, vol. 97, no. 1, pp. 43-48, Jan. 2009.
    • (2009) Proc. IEEE , vol.97 , Issue.1 , pp. 43-48
    • Motoyoshi, M.1
  • 56
    • 84876588873 scopus 로고    scopus 로고
    • Hybrid memory cube (HMC): Breakthrough DRAM performance with a fundamentally re-architected DRAM subsystem
    • [Online]. Available
    • J. T. Pawlowski, Hybrid memory cube (HMC): Breakthrough DRAM performance with a fundamentally re-architected DRAM subsystem, Hot Chips 23, 2011. [Online]. Available: http://www.hotchips.org/wp-content/uploads/hc-archives/hc23/HC23.18.3-memory-FPGA/HC23.18.320-HybridCube-Pawlowski-Micron.pdf.
    • (2011) Hot Chips , vol.23
    • Pawlowski, J.T.1
  • 57
    • 84904469580 scopus 로고    scopus 로고
    • ND: Analyzing the impact of 3D-stacked memory+logic devices on map reduce workloads
    • S. Pugsley et al., "ND: Analyzing the impact of 3D-stacked memory+logic devices on map reduce workloads," in Proc. Int. Symp. Performance Anal. Syst. Softw., 2014, pp. 190-200.
    • Proc. Int. Symp. Performance Anal. Syst. Softw., 2014 , pp. 190-200
    • Pugsley, S.1
  • 59
    • 84928594785 scopus 로고    scopus 로고
    • Active memory cube: A processing-in-memory architecture for exascale systems
    • R. Nair et al., "Active memory cube: A processing-in-memory architecture for exascale systems," IBM J. Res. Develop., vol. 59, no. 2/3, pp. 17:1-17:14, 2015.
    • (2015) IBM J. Res. Develop. , vol.59 , Issue.2-3 , pp. 17:1-17:14
    • Nair, R.1
  • 60
    • 84934312471 scopus 로고    scopus 로고
    • Implementation and evaluation of a scalable application-level checkpoint-recovery scheme for MPI programs
    • M. Schulz et al., "Implementation and evaluation of a scalable application-level checkpoint-recovery scheme for MPI programs," in Proc. 2004 ACM/IEEE Conf. Supercomput., Nov. 2004, pp. 38-51.
    • Proc. 2004 ACM/IEEE Conf. Supercomput., Nov. 2004 , pp. 38-51
    • Schulz, M.1
  • 61
    • 79953281019 scopus 로고    scopus 로고
    • The world's technological capacity to store, communicate, compute information
    • M. Hilbert and P. López, "The world's technological capacity to store, communicate, compute information," Science, vol. 332, no. 6025, pp. 60-65, 2011.
    • (2011) Science , vol.332 , Issue.6025 , pp. 60-65
    • Hilbert, M.1    López, P.2
  • 62
    • 84937244960 scopus 로고    scopus 로고
    • Available
    • Wikipedia, Information society. [Online]. Available: http://en.wikipedia.org/wiki/Information-society.
    • Information Society. [Online]
  • 64
    • 58149231291 scopus 로고    scopus 로고
    • A bipolar-selected phase change memory featuring multi-level cell storage
    • Jan.
    • F. Bedeschi et al., "A bipolar-selected phase change memory featuring multi-level cell storage," IEEE J. Solid-State Circuits, vol. 44, no. 1, pp. 217-227, Jan. 2009.
    • (2009) IEEE J. Solid-State Circuits , vol.44 , Issue.1 , pp. 217-227
    • Bedeschi, F.1
  • 65
    • 49049088756 scopus 로고    scopus 로고
    • GPU computing
    • May
    • J. D. Owens et al., "GPU computing," Proc. IEEE, vol. 96, no. 5, pp. 879-889, May 2008.
    • (2008) Proc. IEEE , vol.96 , Issue.5 , pp. 879-889
    • Owens, J.D.1
  • 66
    • 25844503119 scopus 로고    scopus 로고
    • Introduction to the Cell multiprocessor
    • Jul.
    • J. A. Kahle et al., "Introduction to the Cell multiprocessor," IBM J. Res. Develop., vol. 49, no. 4/5, pp. 589-604, Jul. 2005.
    • (2005) IBM J. Res. Develop. , vol.49 , Issue.4-5 , pp. 589-604
    • Kahle, J.A.1
  • 67
    • 84911882265 scopus 로고    scopus 로고
    • An efficient and scalable semiconductor architecture for parallel automata processing
    • Dec.
    • P. Dlugosch, D. Brown, P. Glendenning, M. Leventhal, and H. Noyes, "An efficient and scalable semiconductor architecture for parallel automata processing," IEEE Trans. Parallel Distrib. Syst., vol. 25, no. 12, pp. 3088-3098, Dec. 2014.
    • (2014) IEEE Trans. Parallel Distrib. Syst. , vol.25 , Issue.12 , pp. 3088-3098
    • Dlugosch, P.1    Brown, D.2    Glendenning, P.3    Leventhal, M.4    Noyes, H.5
  • 68
    • 33644661238 scopus 로고    scopus 로고
    • Content-addressable memory (CAM) circuits and architectures: A tutorial and survey
    • Mar.
    • K. Pagiamtzis and A. Sheikholeslami, "Content-addressable memory (CAM) circuits and architectures: A tutorial and survey," IEEE J. Solid-State Circuits, vol. 41, no. 3, pp. 712-727, Mar. 2006.
    • (2006) IEEE J. Solid-State Circuits , vol.41 , Issue.3 , pp. 712-727
    • Pagiamtzis, K.1    Sheikholeslami, A.2
  • 69
    • 0002387237 scopus 로고
    • Architecture and applications of the connection machine
    • L. W. Tucker and G. G. Robertson, "Architecture and applications of the connection machine," Computer, vol. 21, no. 8, pp. 26-38, 1988.
    • (1988) Computer , vol.21 , Issue.8 , pp. 26-38
    • Tucker, L.W.1    Robertson, G.G.2
  • 71
    • 0024070146 scopus 로고
    • Artificial neural networks
    • J. J. Hopfield, "Artificial neural networks," IEEE Circuits Devices Mag., vol. 4, no. 5, pp. 3-10, 1988.
    • (1988) IEEE Circuits Devices Mag. , vol.4 , Issue.5 , pp. 3-10
    • Hopfield, J.J.1
  • 74
    • 84937244961 scopus 로고    scopus 로고
    • Available
    • Numenta, Inc., The path to machine intelligence. [Online]. Available: http://numenta.com/assets/pdf/whitepapers/Numenta%20-%20Path%20to%20Machine%20Intelligence%20White%20Paper.pdf.
    • The Path to Machine Intelligence. [Online]
  • 75
    • 84937244962 scopus 로고    scopus 로고
    • Available
    • DARPA, The SyNAPSE program. [Online]. Available: http://www.darpa.mil/Our-Work/DSO/Programs/Systems-of-Neuromorphic-Adaptive-Plastic-Scalable-Electronics-%28SYNAPSE%29.aspx.
    • The SyNAPSE Program. [Online]
  • 76
    • 84905915006 scopus 로고    scopus 로고
    • A million spiking-neuron integrated circuit with a scalable communication network and interface
    • Aug.
    • P. A. Merolla et al., "A million spiking-neuron integrated circuit with a scalable communication network and interface," Science, vol. 345, no. 6197, pp. 668-673, Aug. 2014.
    • (2014) Science , vol.345 , Issue.6197 , pp. 668-673
    • Merolla, P.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.