EXECUBE - A new architecture for scaleable MPPs

Proceedings of the International Conference on Parallel Processing

Volumn 1, Issue , 1994, Pages

  Kogge, Peter ^a  

^a LOCKHEED MARTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUILDING BLOCKES; CHIP ARCHITECTURE; COMPUTATIONAL MODEL; CONVENTIONAL DESIGN; REAL APPLICATIONS; SCALEABLE; SINGLE PARTS; STATE OF THE ART;

PARALLEL ARCHITECTURES;

EID: 84904306144     PISSN: 01903918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPP.1994.108     Document Type: Conference Paper

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